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74HC237D PDF预览

74HC237D

更新时间: 2024-11-29 14:55:19
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
10页 223K
描述
3-to-8 Line Decoder, SOIC16

74HC237D 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP,Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:12 weeks风险等级:1.61
Is Samacsys:N系列:HC/UH
输入调节:LATCHEDJESD-30 代码:R-PDSO-G16
长度:9.9 mm逻辑集成电路类型:OTHER DECODER/DRIVER
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):270 ns座面最大高度:1.75 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

74HC237D 数据手册

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74HC237D  
CMOS Digital Integrated Circuits Silicon Monolithic  
74HC237D  
1. Functional Description  
3-to-8 Line Decoder/Latch  
2. General  
The 74HC237D is a high speed CMOS 3-to-8 DECODER ADDRESS LATCH fabricated with silicon gate C2MOS  
technology.  
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power  
dissipation.  
It is composed of a 3-bit input latches with a common GL enable input and 3-to-8 line decoder with enable inputs  
G1 and G2. The 3-bit binary data is stored into the input latch on the high level of GL. The value of this data  
determines which one of the outputs will go low.  
When the enable input G1 is held low or G2 is held high, decoding function is inhibited and all the 8 outputs go  
high. The two enable inputs are provided to ease cascade connection and permits the application address decoder  
for memory system.  
All inputs are equipped with protection circuits against static discharge or transient excess voltage.  
3. Features  
(1) High speed: tpd = 12 ns (typ.) at VCC = 5 V  
(2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  
(3) Balanced propagation delays: tPLH tPHL  
(4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V  
4. Packaging  
SOIC16  
Start of commercial production  
2016-05  
©2016 Toshiba Corporation  
2016-08-04  
Rev.3.0  
1

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