5秒后页面跳转
74HC1G00GW-Q100H PDF预览

74HC1G00GW-Q100H

更新时间: 2024-01-22 05:30:37
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
12页 104K
描述
74HC(T)1G00-Q100 - 2-input NAND gate TSSOP 5-Pin

74HC1G00GW-Q100H 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:TSSOP包装说明:1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5
针数:5Reach Compliance Code:compliant
风险等级:5.76Is Samacsys:N
Base Number Matches:1

74HC1G00GW-Q100H 数据手册

 浏览型号74HC1G00GW-Q100H的Datasheet PDF文件第2页浏览型号74HC1G00GW-Q100H的Datasheet PDF文件第3页浏览型号74HC1G00GW-Q100H的Datasheet PDF文件第4页浏览型号74HC1G00GW-Q100H的Datasheet PDF文件第6页浏览型号74HC1G00GW-Q100H的Datasheet PDF文件第7页浏览型号74HC1G00GW-Q100H的Datasheet PDF文件第8页 
NXP Semiconductors  
74HC1G00-Q100; 74HCT1G00-Q100  
2-input NAND gate  
Table 7.  
Static characteristics …continued  
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C.  
Symbol  
Parameter  
Conditions  
40 C to +85 C  
Min Typ Max  
40 C to +125 C Unit  
Min Max  
ICC  
ICC  
CI  
supply current  
VI = VCC or GND; IO = 0 A;  
VCC = 5.5 V  
-
-
-
10  
500  
-
-
-
-
20  
A  
A  
pF  
additional supply  
current  
per input; VCC = 4.5 V to 5.5 V;  
VI = VCC 2.1 V; IO = 0 A  
-
850  
-
input capacitance  
- 1.5  
11. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
GND = 0 V; tr = tf 6.0 ns; All typical values are measured at Tamb = 25 C. For test circuit, see Figure 6  
Symbol Parameter  
Conditions  
40 C to +85 C  
Min Typ Max  
40 C to +125 C Unit  
Min  
Max  
For type 74HC1G00-Q100  
[1]  
tpd  
propagation delay A and B to Y; see Figure 5  
VCC = 2.0 V; CL = 50 pF  
-
-
-
-
-
25  
115  
23  
-
-
-
-
-
135  
ns  
ns  
ns  
ns  
pF  
VCC = 4.5 V; CL = 50 pF  
9
27  
-
VCC = 5.0 V; CL = 15 pF  
7
VCC = 6.0 V; CL = 50 pF  
8
20  
-
23  
[2]  
[1]  
CPD  
power dissipation VI = GND to VCC  
capacitance  
19  
-
-
-
-
For type 74HCT1G00-Q100  
tpd  
propagation delay A and B to Y; see Figure 5  
VCC = 4.5 V; CL = 50 pF  
VCC = 5.0 V; CL = 15 pF  
-
-
-
12  
10  
21  
24  
-
-
-
27  
-
ns  
ns  
pF  
[2]  
CPD  
power dissipation VI = GND to VCC 1.5 V  
-
capacitance  
[1] tpd is the same as tPLH and tPHL  
.
[2] CPD is used to determine the dynamic power dissipation PD (W).  
PD = CPD VCC2 fi + (CL VCC2 fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz  
CL = output load capacitance in pF  
VCC = supply voltage in Volts  
(CL VCC2 fo) = sum of outputs  
74HC_HCT1G00_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 1 — 16 September 2013  
5 of 12  
 
 
 
 

与74HC1G00GW-Q100H相关器件

型号 品牌 描述 获取价格 数据表
74HC1G00-Q100 NEXPERIA 2-input NAND gate

获取价格

74HC1G02 NXP 2-input NOR gate

获取价格

74HC1G02GV NXP 2-input NOR gate

获取价格

74HC1G02GV NEXPERIA 2-input NOR gateProduction

获取价格

74HC1G02GV,125 NXP 74HC(T)1G02 - 2-input NOR gate TSOP 5-Pin

获取价格

74HC1G02GV-Q100 NXP HC/UH SERIES, 2-INPUT NOR GATE, PDSO5, PLASTIC, SOT-753, SC-74A, 5 PIN

获取价格