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74HC125 PDF预览

74HC125

更新时间: 2024-11-06 06:31:51
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 128K
描述
Quad 3−State Noninverting Buffers

74HC125 数据手册

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74HC125  
Quad 3−State Noninverting  
Buffers  
HighPerformance SiliconGate CMOS  
The 74HC125 is identical in pinout to the LS125. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors,  
they are compatible with LSTTL outputs.  
The HC125 noninverting buffer is designed to be used with 3state  
memory address drivers, clock drivers, and other busoriented  
systems. The device has four separate output enables that are  
activelow.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
SOIC14  
D SUFFIX  
CASE 751A  
HC125G  
AWLYWW  
14  
Features  
1
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
1
Low Input Current: 1.0 mA  
14  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the JEDEC Standard No. 7A Requirements  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
Chip Complexity: 72 FETs or 18 Equivalent Gates  
These are PbFree Devices  
HC  
125  
TSSOP14  
DT SUFFIX  
CASE 948G  
14  
ALYWG  
1
G
1
A
L, WL  
Y
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
March, 2007 Rev. 0  
74HC125/D  

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