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74HC123PW PDF预览

74HC123PW

更新时间: 2024-11-17 11:10:47
品牌 Logo 应用领域
安世 - NEXPERIA 时钟输入元件光电二极管逻辑集成电路
页数 文件大小 规格书
20页 317K
描述
Dual retriggerable monostable multivibrator with resetProduction

74HC123PW 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.01Is Samacsys:N
其他特性:RETRIGGERABLE; TRIGGERABLE FROM CLEAR INPUT ALSO系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR湿度敏感等级:1
数据/时钟输入次数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):385 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

74HC123PW 数据手册

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74HC123; 74HCT123  
Dual retriggerable monostable multivibrator with reset  
Rev. 12 — 11 August 2021  
Product data sheet  
1. General description  
The 74HC123; 74HCT123 is a dual retriggerable monostable multivibrator with reset. The basic  
output pulse width is programmed by selection of external components (REXT and CEXT). Once  
triggered this basic pulse width may be extended by retriggering either of the edge triggered  
inputs (nA or nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW)  
can be made as long as desired. Alternatively, an output delay can be terminated at any time by  
a LOW-going edge on input nRD. Inputs include clamp diodes. This enables the use of current  
limiting resistors to interface inputs to voltages in excess of VCC  
.
Schmitt-trigger action in the nA and nB inputs, makes the circuit highly tolerant to slower input rise  
and fall times.  
2. Features and benefits  
Wide supply voltage range from 2.0 V to 6.0 V  
CMOS low power dissipation  
High noise immunity  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Complies with JEDEC standards:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
Input levels:  
For 74HC123: CMOS level  
For 74HCT123: TTL level  
DC triggered from active HIGH or active LOW inputs  
Retriggerable for very long pulses up to 100 % duty factor  
Direct reset terminates output pulse  
Schmitt-trigger action on all inputs except for the reset input  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
 
 

74HC123PW 替代型号

型号 品牌 替代类型 描述 数据表
74HC123PW,118 NXP

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