Datasheet > 74HC08D

74HC08D

更新时间： 2024-11-19 11:10:39

品牌	Logo	应用领域
安世 - NEXPERIA		光电二极管逻辑集成电路
页数	文件大小	规格书
13页	237K
描述
Quad 2-input AND gateProduction

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74HC08D 数据手册

74HC08; 74HCT08

Quad 2-input AND gate

Rev. 8 — 10 August 2021

Product data sheet

1. General description

The 74HC08; 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the

use of current limiting resistors to interface inputs to voltages in excess of V_CC

2. Features and benefits

•

Wide supply voltage range from 2.0 V to 6.0 V

•

CMOS low power dissipation

High noise immunity

Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Input levels:

•

For 74HC08: CMOS level

For 74HCT08: TTL level

•

Complies with JEDEC standards:

•

JESD8C (2.7 V to 3.6 V)

JESD7A (2.0 V to 6.0 V)

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

•

Multiple package options

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC08D

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74HCT08D

74HC08PW

74HCT08PW

74HC08BQ

74HCT08BQ

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

SOT762-1

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

12 3 4 5 6 7...13

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