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74HC08DTR2G PDF预览

74HC08DTR2G

更新时间: 2024-09-28 08:03:39
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路光电二极管
页数 文件大小 规格书
7页 122K
描述
Quad 2−Input AND Gate High−Performance Silicon−Gate CMOS

74HC08DTR2G 数据手册

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74HC08  
Quad 2−Input AND Gate  
HighPerformance SiliconGate CMOS  
The 74HC08 is identical in pinout to the LS08. The device inputs are  
compatible with Standard CMOS outputs; with pullup resistors, they  
are compatible with LSTTL outputs.  
http://onsemi.com  
MARKING  
Features  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
DIAGRAMS  
14  
Low Input Current: 1.0 mA  
SOIC14  
D SUFFIX  
CASE 751A  
HC08G  
AWLYWW  
14  
14  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With the JEDEC Standard No. 7A Requirements  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
Chip Complexity: 24 FETs or 6 Equivalent Gates  
These are PbFree Devices  
1
1
14  
HC  
08  
TSSOP14  
DT SUFFIX  
CASE 948G  
LOGIC DIAGRAM  
ALYW G  
1
1
G
A1  
3
1
Y1  
2
B1  
4
A2  
6
HC08  
A
= Device Code  
= Assembly Location  
WL or L = Wafer Lot  
= Year  
WW or W = Work Week  
Y2  
5
B2  
Y = AB  
9
Y
A3  
8
Y3  
10  
G or G  
= PbFree Package  
B3  
(Note: Microdot may be in either location)  
12  
A4  
11  
Y4  
13  
B4  
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
Pinout: 14Lead Packages (Top View)  
L
L
L
H
L
L
L
V
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
CC  
14  
H
H
L
H
H
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
1
2
3
4
5
6
7
A1  
B1  
Y1  
A2  
B2  
Y2 GND  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
March, 2007 Rev. 1  
74HC08/D  
 

74HC08DTR2G 替代型号

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