5秒后页面跳转
捷配首页

Datasheet > 74AVC16834DGGRE4
74AVC16834DGGRE4 PDF预览

74AVC16834DGGRE4

更新时间： 2024-09-17 02:58:39
品牌 Logo 应用领域
德州仪器 - TI 驱动输出元件
页数 文件大小 规格书
17页 359K
描述
18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

74AVC16834DGGRE4 数据手册

 浏览型号74AVC16834DGGRE4的Datasheet PDF文件第2页浏览型号74AVC16834DGGRE4的Datasheet PDF文件第3页浏览型号74AVC16834DGGRE4的Datasheet PDF文件第4页浏览型号74AVC16834DGGRE4的Datasheet PDF文件第5页浏览型号74AVC16834DGGRE4的Datasheet PDF文件第6页浏览型号74AVC16834DGGRE4的Datasheet PDF文件第7页 
SN74AVC16834  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES183H–DECEMBER 1998–REVISED JUNE 2005  
FEATURES  
•
•
•
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
•
Member of the Texas Instruments Widebus™  
Family  
Ioff Supports Partial-Power-Down Mode  
Operation  
•
DOC™ (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without Speed  
Degradation  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
•
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA  
at 2.5-V VCC  
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
DESCRIPTION/ORDERING INFORMATION  
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows  
typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At  
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a  
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family  
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry  
Technology and Applications, literature number SCEA009.  
3.2  
T
A
= 25°C  
T
A
= 25°C  
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
CC  
= 3.3 V  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
V
CC  
= 3.3 V  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
0
17  
34  
51  
68  
85 102 119 136 153 170  
-160 -144 -128 -112 -96 -80 -64 -48 -32 -16  
- Output Current - mA  
0
I
- Output Current - mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 18-bit universal bus driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to  
3.6-V VCC operation.  
Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode  
when the latch-enable (LE) input is low. The A data is latched if the clock (CLK) input is held at a high or low  
logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is  
high, the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, DOC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 
1234567...17

中文翻译

下载PDF

74AVC16834DGGRE4 替代型号

型号 品牌 替代类型 描述 数据表
74AVC16834DGVRE4 TI

完全替代

 18-Bit Universal Bus Driver With 3-State Outputs 56-TVSOP -40 to 85
74AVC16834DGVRG4 TI

完全替代

 18-Bit Universal Bus Driver With 3-State Outputs 56-TVSOP -40 to 85
SN74AVC16834DGGR TI

类似代替

 18-Bit Universal Bus Driver With 3-State Outputs 56-TSSOP -40 to 85

与74AVC16834DGGRE4相关器件

型号 品牌 获取价格 描述 数据表
74AVC16834DGGRG4 TI

获取价格

 		AVC SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56
74AVC16834DGVRE4 TI

获取价格

 		18-Bit Universal Bus Driver With 3-State Outputs 56-TVSOP -40 to 85
74AVC16834DGVRG4 TI

获取价格

 		18-Bit Universal Bus Driver With 3-State Outputs 56-TVSOP -40 to 85
74AVC16835 NXP

获取价格

 		18-bit registered driver 3-State
74AVC16835A ETC

获取价格

 		18-bit registered driver with Dynamic Controlled Outputs(TM) (3-State)
74AVC16835ADG NXP

获取价格

 		IC AVC SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153, SOT-364-1, TS
74AVC16835ADGG ETC

获取价格

 		18-Bit Buffer/Driver
74AVC16835ADGG,112 NXP

获取价格

 		74AVC16835A - 18-bit registered driver with Dynamic Controlled Outputs(TM) (3-State) TSSOP
74AVC16835ADGG,118 NXP

获取价格

 		74AVC16835A - 18-bit registered driver with Dynamic Controlled Outputs(TM) (3-State) TSSOP
74AVC16835ADG-T NXP

获取价格

 		IC AVC SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153, SOT-364-1, TS

与74AVC16834DGGRE4相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证