74AUP1G14

更新时间： 2024-11-08 22:49:47

品牌	Logo	应用领域
恩智浦 - NXP		触发器
页数	文件大小	规格书
20页	98K
描述
Low-power Schmitt-trigger inverter

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技术参数
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74AUP1G14 技术参数

生命周期：	Active	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.57	接口集成电路类型：	LINE DRIVER
Base Number Matches：	1

74AUP1G14 数据手册

74AUP1G14

Low-power Schmitt-trigger inverter

Rev. 01 — 20 July 2005

Product data sheet

1. General description

The 74AUP1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device,

superior to most advanced CMOS compatible TTL families.

This device ensures a very low static and dynamic power consumption across the entire

V_CCrange from 0.8 V to 3.6 V.

This device is fully speciﬁed for partial Power-down applications using I_OFF

The I_OFFcircuitry disables the output, preventing the damaging backﬂow current through

the device when it is powered down.

The 74AUP1G14 provides a single inverting Schmitt-trigger which accepts standard input

signals. It is capable of transforming slowly changing input signals into sharply deﬁned,

jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference

between the positive voltage V_(th)LHand the negative voltage V_(th)HLis deﬁned as the input

hysteresis voltage V_hys

2. Features

■ Wide supply voltage range from 0.8 V to 3.6 V

■ High noise immunity

■ ESD protection:

◆ HBM JESD22-A114-C exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V

◆ CDM JESD22-C101-C exceeds 1000 V

■ Low static power consumption; I_CC= 0.9 µA (maximum)

■ Latch-up performance exceeds 100 mA per JESD 78 Class II

■ Inputs accept voltages up to 3.6 V

■ Low noise overshoot and undershoot < 10 % of V_CC

■ I_OFFcircuitry provides partial Power-down mode operation

■ Multiple package options

■ Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C

3. Applications

■ Wave and pulse shaper

■ Astable multivibrator

■ Monostable multivibrator

12 3 4 5 6 7...20

中文翻译

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