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74AUP1G132GM,115 PDF预览

74AUP1G132GM,115

更新时间: 2024-02-21 11:57:16
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
18页 86K
描述
74AUP1G132 - Low-power 2-input NAND Schmitt trigger SON 6-Pin

74AUP1G132GM,115 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:1 X 1.45 MM, 0.50 MM HEIGHT, ROHS COMPLIANT, PLASTIC, MO-252, SOT-886, SON-6
针数:6Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.48
系列:AUP/ULP/VJESD-30 代码:R-PDSO-N6
JESD-609代码:e3长度:1.45 mm
负载电容(CL):30 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.0017 A湿度敏感等级:1
功能数量:1输入次数:2
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装等效代码:SOLCC6,.04,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:1.2/3.3 VProp。Delay @ Nom-Sup:27.9 ns
传播延迟(tpd):27.9 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:0.5 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.2 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1 mmBase Number Matches:1

74AUP1G132GM,115 数据手册

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74AUP1G132  
NXP Semiconductors  
Low-power 2-input NAND Schmitt trigger  
12. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 8.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +125 °C  
Unit  
Min Typ[1] Max  
Min  
Max  
Max  
(85 °C) (125 °C)  
CL = 5 pF  
[2]  
[2]  
[2]  
[2]  
tpd  
propagation delay  
A or B to Y; see Figure 7  
VCC = 0.8 V  
-
22.5  
6.3  
4.6  
3.9  
3.2  
2.9  
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
2.6  
2.2  
1.9  
1.7  
1.6  
13.4  
8.2  
6.6  
5.3  
4.7  
2.4  
1.9  
1.7  
1.5  
1.4  
15.1  
9.7  
7.9  
6.2  
5.6  
16.6  
10.7  
8.7  
6.8  
6.2  
CL = 10 pF  
tpd  
propagation delay  
A or B to Y; see Figure 7  
VCC = 0.8 V  
-
26.1  
7.2  
5.2  
4.5  
3.8  
3.5  
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
3.0  
2.5  
2.3  
2.1  
2.0  
15.4  
9.3  
7.5  
6.1  
5.5  
2.7  
2.2  
2.0  
1.8  
1.8  
17.3  
11.0  
9.0  
19.0  
12.1  
9.9  
7.2  
7.9  
6.5  
7.2  
CL = 15 pF  
tpd  
propagation delay  
A or B to Y; see Figure 7  
VCC = 0.8 V  
-
29.6  
8.0  
5.8  
5.0  
4.2  
3.9  
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
3.3  
2.8  
2.6  
2.3  
2.2  
17.2  
10.4  
8.3  
3.0  
2.5  
2.3  
2.1  
2.0  
19.4  
12.3  
10.0  
7.9  
21.3  
13.5  
11.0  
8.7  
6.7  
6.1  
7.3  
8.0  
CL = 30 pF  
tpd  
propagation delay  
A or B to Y; see Figure 7  
VCC = 0.8 V  
-
39.9  
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
4.3  
3.6  
3.2  
3.0  
2.8  
10.2 22.6  
3.8  
3.2  
2.9  
2.7  
2.7  
25.4  
15.8  
12.8  
10.1  
9.2  
27.9  
17.4  
14.1  
11.1  
10.1  
7.3  
6.3  
5.3  
5.0  
13.3  
10.6  
8.5  
7.8  
74AUP1G132_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 15 June 2009  
7 of 18  
 

74AUP1G132GM,115 替代型号

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74AUP1G132 - Low-power 2-input NAND Schmitt trigger SON 6-Pin

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