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74ALVTH16244VRG4 PDF预览

74ALVTH16244VRG4

更新时间: 2024-11-13 03:02:31
品牌 Logo 应用领域
德州仪器 - TI 输出元件驱动
页数 文件大小 规格书
19页 530K
描述
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

74ALVTH16244VRG4 数据手册

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SN54ALVTH16244, SN74ALVTH16244  
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCES070G – JUNE 1996 – REVISED MAY 1999  
SN54ALVTH16244 . . . WD PACKAGE  
SN74ALVTH16244 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
5-V I/O Compatible  
4
5
High Drive Capability (–32 mA/64 mA)  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
6
7
V
V
)
CC  
CC  
CC  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
Support Unregulated Battery Operation  
Down to 2.3 V  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
Auto3-State Eliminates Bus Current  
Loading When Voltage at the Output  
Exceeds V  
CC  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
V
V
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
CC  
CC  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4OE  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), Thin Very  
Small-Outline (DGV) Packages, and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
NOTE: For tape and reel order entry:  
The DGGR package is abbreviated to GR, and  
the DGVR package is abbreviated to VR.  
description  
The ’ALVTH16244 devices are 16-bit buffers/line drivers designed for 2.5-V or 3.3-V V  
operation, but with  
CC  
the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit  
buffers, two 8-bit buffers, or one 16-bit buffer.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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