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74ALVC16841MTD PDF预览

74ALVC16841MTD

更新时间: 2024-11-08 22:56:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
6页 98K
描述
Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs

74ALVC16841MTD 数据手册

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November 2001  
Revised November 2001  
74ALVC16841  
Low Voltage 20-Bit Transparent Latch  
with 3.6V Tolerant Inputs and Outputs  
General Description  
Features  
I 1.65V–3.6V VCC supply operation  
The ALVC16841 contains twenty non-inverting latches with  
3-STATE outputs and is intended for bus oriented applica-  
tions. The device is byte controlled. The flip-flops appear  
transparent to the data when the Latch enable (LE) is  
HIGH. When LE is LOW, the data that meets the setup time  
is latched. Data appears on the bus when the Output  
Enable (OE) is LOW. When OE is HIGH, the outputs are in  
a high impedance state.  
I 3.6V tolerant inputs and outputs  
I tPD (Dn to On)  
3.5 ns max for 3.0V to 3.6V VCC  
3.9 ns max for 2.3V to 2.7V VCC  
6.8 ns max for 1.65V to 1.95V VCC  
I Power-off high impedance inputs and outputs  
I Supports live insertion and withdrawal (Note 1)  
I Uses patented noise/EMI reduction circuitry  
I Latchup conforms to JEDEC JED78  
I ESD performance:  
The 74ALVC16841 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O compatibility up to 3.6V.  
The 74ALVC16841 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pull-up resistor; the minimum  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74ALVC16841MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
LEn  
Output Enable Input (Active LOW)  
Latch Enable Input  
Inputs  
D0D19  
O0O19  
Outputs  
© 2001 Fairchild Semiconductor Corporation  
DS500690  
www.fairchildsemi.com  

74ALVC16841MTD 替代型号

型号 品牌 替代类型 描述 数据表
74VCX16841MTDX FAIRCHILD

类似代替

10-Bit D-Type Latch
74VCX16841MTD FAIRCHILD

类似代替

Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
74ALVCH16841DGGRE4 TI

功能相似

20-Bit Bus-Interface D-Type Latch With 3-State Outputs 56-TSSOP -40 to 85

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