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74ACT715_1

更新时间: 2024-11-02 11:50:19
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飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
18页 424K
描述
Programmable Video Sync Generator

74ACT715_1 数据手册

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April 2007  
74ACT715, 74ACT715-R  
tm  
Programmable Video Sync Generator  
Features  
General Description  
Maximum Input Clock Frequency > 130MHz  
Interlaced and non-interlaced formats available  
The ACT715 and ACT715-R are 20-pin TTL-input  
compatible devices capable of generating Horizontal,  
Vertical and Composite Sync and Blank signals for tele-  
visions and monitors. All pulse widths are completely  
definable by the user. The devices are capable of gener-  
ating signals for both interlaced and noninterlaced  
modes of operation. Equalization and serration pulses  
can be introduced into the Composite Sync signal when  
needed.  
Separate or composite horizontal and vertical Sync  
and Blank signals available  
Complete control of pulse width via register  
programming  
All inputs are TTL compatible  
8mA drive on all outputs  
Default RS170/NTSC values mask programmed into  
Four additional signals can also be made available when  
Composite Sync or Blank are used. These signals can  
be used to generate horizontal or vertical gating pulses,  
cursor position or vertical Interrupt signal.  
registers  
ACT715-R is mask programmed to default to a Clock  
Enable state for easier start-up into 14.31818MHz  
RS170 timing  
These devices make no assumptions concerning the  
system architecture. Line rate and field/frame rate are all  
a function of the values programmed into the data regis-  
ters, the status register, and the input clock frequency.  
The ACT715 is mask programmed to default to a Clock  
Disable state. Bit 10 of the Status Register, Register 0,  
defaults to a logic “0”. This facilitates (re)programming  
before operation.  
The ACT715-R is the same as the ACT715 in all  
respects except that the ACT715-R is mask pro-  
grammed to default to a Clock Enabled state. Bit 10 of  
the Status Register defaults to a logic “1”. Although  
completely (re)programmable, the ACT715-R version is  
better suited for applications using the default  
14.31818MHz RS-170 register values. This feature  
allows power-up directly into operation, following a single  
CLEAR pulse.  
Ordering Information  
Package  
Order Number  
74ACT715SC  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
74ACT715-RSC  
M20B  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
FACT™ is a trademark of Fairchild Semiconductor Corporation.  
©1988 Fairchild Semiconductor Corporation  
74ACT715, 74ACT715-R Rev. 1.3  
www.fairchildsemi.com  

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