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74ACT273SCX_NL PDF预览

74ACT273SCX_NL

更新时间: 2023-08-15 00:00:00
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管
页数 文件大小 规格书
12页 377K
描述
D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, MS-013, SOIC-20

74ACT273SCX_NL 数据手册

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January 2008  
74AC273, 74ACT273  
Octal D-Type Flip-Flop  
Features  
General Description  
Ideal buffer for microprocessor or memory  
Eight edge-triggered D-type flip-flops  
Buffered common clock  
The AC273 and ACT273 have eight edge-triggered  
D-type flip-flops with individual D-type inputs and Q  
outputs. The common buffered Clock (CP) and Master  
Reset (MR) input load and reset (clear) all flip-flops  
simultaneously.  
Buffered, asynchronous master reset  
See 377 for clock enable version  
See 373 for transparent latch version  
See 374 for 3-STATE version  
The register is fully edge-triggered. The state of each  
D-type input, one setup time before the LOW-to-HIGH  
clock transition, is transferred to the corresponding flip-  
flop's Q output.  
Outputs source/sink 24mA  
74ACT273 has TTL-compatible inputs  
All outputs will be forced LOW independently of Clock or  
Data inputs by a LOW voltage level on the MR input. The  
device is useful for applications where the true output  
only is required and the Clock and Master Reset are  
common to all storage elements.  
Ordering Information  
Package  
Order Number  
74AC273SC  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC273SJ  
M20D  
74AC273MTC  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74AC273PC  
N20A  
M20B  
M20D  
MTC20  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74ACT273SC  
74ACT273SJ  
74ACT273MTC  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
©1988 Fairchild Semiconductor Corporation  
74AC273, 74ACT273 Rev. 1.6.0  
www.fairchildsemi.com  

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