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74ACT174SCT PDF预览

74ACT174SCT

更新时间: 2024-11-23 12:58:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 102K
描述
D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, CMOS, PDSO16, SOIC-16

74ACT174SCT 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.25Is Samacsys:N
系列:ACTJESD-30 代码:R-PDSO-G16
长度:9.9 mm逻辑集成电路类型:D FLIP-FLOP
位数:6功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):11.5 ns认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:200 MHzBase Number Matches:1

74ACT174SCT 数据手册

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November 1988  
Revised November 1999  
74AC174 74ACT174  
Hex D-Type Flip-Flop with Master Reset  
General Description  
Features  
The AC/ACT174 is a high-speed hex D-type flip-flop. The  
device is used primarily as a 6-bit edge-triggered storage  
register. The information on the D inputs is transferred to  
storage during the LOW-to-HIGH clock transition. The  
device has a Master Reset to simultaneously clear all flip-  
flops.  
ICC reduced by 50%  
Outputs source/sink 24 mA  
ACT174 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC174SC  
74AC174SJ  
M16A  
M16D  
N16E  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC174PC  
74ACT174SC  
74ACT174SJ  
74ACT174MTC  
74ACT174PC  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
D0D5  
CP  
Data Inputs  
Clock Pulse Input  
Master Reset Input  
Outputs  
MR  
Q0Q5  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009935  
www.fairchildsemi.com  

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