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74ACT175 PDF预览

74ACT175

更新时间: 2024-02-17 18:01:23
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
6页 182K
描述
QUAD D FLIP-FLOP WITH MASTER RESET

74ACT175 技术参数

生命周期:Contact Manufacturer包装说明:SOP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.74Is Samacsys:N
Base Number Matches:1

74ACT175 数据手册

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QUAD D FLIP-FLOP  
WITH MASTER RESET  
The MC74AC/ACT175 is a high-speed quad D flip-flop. The device is useful for  
general flip-flop requirements where clock and clear inputs are common. The  
information on the D inputs is transferred to storage during the LOW-to-HIGH clock  
transition. The device has a Master Reset to simultaneously clear all flip-flops, when  
MR is low.  
The MC74AC/ACT175 consists of four edge-triggered D flip-flops with individual  
D inputs and Q and Q outputs. The Clock (CP) and Master Reset (MR) are common  
to all flip-flops. Each D input’s state is transferred to the corresponding flip-flop’s  
output following the LOW-to-HIGH Clock (CP) transition. A LOW input to the Master  
Reset (MR) will force all Q outputs LOW and Q outputs HIGH independent of Clock  
or Data inputs. The MC74AC/ACT175 is useful for applications where the Clock and  
Master Reset are common to all storage elements.  
N SUFFIX  
CASE 648-08  
PLASTIC  
Outputs Source/Sink 24 mA  
• ′ACT175 Has TTL Compatible Inputs  
Pinout: 16-Lead Packages (Top View)  
V
Q
Q
D
D
Q
Q
2
CP  
9
CC  
3
3
3
2
2
D SUFFIX  
CASE 751B-05  
PLASTIC  
16  
15  
14  
13  
12  
11  
10  
PIN NAMES  
D
CP  
MR  
Q
Q
– D  
Data Inputs  
0
3
Clock Pulse Input  
Master Reset Input  
Outputs  
– Q  
– Q  
0
0
3
3
Outputs  
1
2
3
4
5
6
7
8
MR  
Q
Q
D
D
Q
Q
1
GND  
0
0
0
1
1
LOGIC SYMBOL  
TRUTH TABLE  
Inputs  
Outputs  
D
D
Q
D
D
0
1
2
1
3
1
MR  
CP  
D
Qn  
Qn  
CP  
L
H
H
H
X
X
H
L
L
H
L
H
L
H
MR  
Q
Q
Q
Q
Q
Q
Q
3
0
0
2
2
3
L
X
Qn  
Qn  
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
= LOW-to-HIGH Transition of Clock  
FACT DATA  
5-1  

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