74ACT11802DW

更新时间： 2024-01-31 16:37:45

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
5页	64K
描述
暂无描述

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74ACT11802DW 数据手册

74ACT11802

TRIPLE 4-INPUT OR/NOR GATE

SCAS153A – D3594, JULY 1990 – REVISED APRIL 1993

DW OR NT PACKAGE

(TOP VIEW)

• Inputs Are TTL-Voltage Compatible

• Flow-Through Architecture Optimizes

PCB Layout

• Center-Pin V

and GND Configurations

Minimize High-Speed Switching Noise

23 1C

22 1D

• EPIC (Enhanced-Performance Implanted

CMOS) 1-µm Process

GND

• 500-mA Typical Latch-Up Immunity

at 125°C

• Package Options Include Plastic

Small-Outline Packages and Standard

Plastic 300-mil DIPs

description

The 74ACT11802 contains three independent 4-input OR/NOR gates. They perform the Boolean functions in

positive logic Y = A + B + C + D and Z = A + B + C + D.

The 74ACT11802 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each 4-input gate)

INPUTS

OUTPUTS

†

logic symbol

logic diagram, each section (positive logic)

≥ 1

†

This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

2–1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5

中文翻译

下载PDF

与74ACT11802DW相关器件

型号	品牌	获取价格	描述	数据表
74ACT11802DWR	TI	获取价格	Triple 4-Input OR/NOR Gates 24-SOIC -40 to 85
74ACT11802NT	TI	获取价格	Triple 4-Input OR/NOR Gates 24-PDIP -40 to 85
74ACT11810	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATE
74ACT11810D	NXP	获取价格	QUAD 2-INPUT EXCLUSIVE-NOR GATE
74ACT11810D	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATE
74ACT11810DR	TI	获取价格	暂无描述
74ACT11810N	TI	获取价格	Quadruple 2-Input Exclusive-NOR Gates 16-PDIP -40 to 85
74ACT11810N	PHILIPS	获取价格	XNOR Gate, CMOS, PDIP16
74ACT11819N	PHILIPS	获取价格	Pipeline Register, CMOS, PDIP28
74ACT11821	TI	获取价格	10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS