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74ACT11810DR PDF预览

74ACT11810DR

更新时间: 2024-02-10 00:04:26
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
6页 92K
描述
暂无描述

74ACT11810DR 数据手册

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ꢈ ꢉꢂꢊꢋ ꢉꢌꢍ ꢎꢏ ꢐꢑꢒ ꢓꢌ ꢉꢄ ꢏꢎꢔ ꢃꢍ ꢉꢕꢒ ꢖꢎꢑꢓꢗ ꢋ ꢏꢘ ꢂꢄ  
SCAS211 − MARCH 1990 − REVISED APRIL 1993  
D OR N PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Flow-Through Architecture to Optimize  
PCB Layout  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1B  
2A  
2B  
V
1A  
1Y  
2Y  
GND  
GND  
3Y  
Center-Pin V  
and GND Configurations to  
Minimize High-Speed Switching Noise  
CC  
EPICt (Enhanced-Performance Implanted  
CC  
CMOS) 1-mm Process  
V
CC  
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Plastic Small-  
Outline Packages and Standard Plastic  
300-mil DIPs  
3A  
3B  
4A  
4Y  
4B  
description  
This device contains four independent Exclusive-NOR gates. They perform the Boolean functions Y = AB =  
(A + B) (A + B) in positive logic.  
A common application is a true/complement element. If one of the inputs is high, the other input will be  
reproduced in true form at the output. If one of the inputs is low, the signal on the other input will be reproduced  
inverted at the output.  
The 74ACT11810 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A
L
B
L
H
L
L
H
L
H
H
L
H
H
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢤ  
Copyright 1993, Texas Instruments Incorporated  
ꢙꢢ  
ꢠꢪ  
ꢒꢚ  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
ꢠꢙ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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