Datasheet > 74AC11TTR

74AC11TTR

更新时间： 2024-09-15 23:23:59

品牌	Logo	应用领域
其他 - ETC		栅
页数	文件大小	规格书
8页	62K
描述
Triple 3-input AND Gate

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中文翻译

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数据手册

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74AC11TTR 数据手册

74AC11

TRIPLE 3-INPUT AND GATE

■

HIGH SPEED: t = 4ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 2µA(MAX.) at T =25°C

■

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

50Ω TRANSMISSION LINE DRIVING

CAPABILITY

SYMMETRICAL OUTPUT IMPEDANCE:

DIP

SOP

TSSOP

T & R

|I | = I = 24mA (MIN)

ORDER CODES

PACKAGE

BALANCED PROPAGATION DELAYS:

TUBE

PLH

PHL

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

DIP

SOP

74AC11B

74AC11M

74AC11MTR

74AC11TTR

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 11

TSSOP

IMPROVED LATCH-UP IMMUNITY

The internal circuit is composed of 2 stages

including buffer output, which enables high noise

immunity and stable output.

DESCRIPTION

The 74AC11 is an advanced high-speed CMOS

TRIPLE 3-INPUT AND GATE fabricated with

sub-micron silicon gate and double-layer metal

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

wiring C MOS tecnology.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

1/8

12 3 4 5 6 7 8

中文翻译

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与74AC11TTR相关器件

型号	品牌	获取价格	描述	数据表
74AC125	NSC	获取价格	Quad Buffer with TRI-STATE Outputs
74AC125	STMICROELECTRONICS	获取价格	QUAD BUS BUFFERS 3-STATE
74AC125	FAIRCHILD	获取价格	Quad Buffer with 3-STATE Outputs
74AC125	ONSEMI	获取价格	QUAD BUFFER WITH 3-STATE OUTPUTS
74AC125	HITACHI	获取价格	Quad Buffer/Line Driver with 3-State Output
74AC125_08	FAIRCHILD	获取价格	Quad Buffer with 3-STATE Outputs
74AC125B	FAIRCHILD	获取价格	QUAD BUS BUFFERS (3-STATE)
74AC125B	STMICROELECTRONICS	获取价格	QUAD BUS BUFFERS 3-STATE
74AC125D	ETC	获取价格	4-Bit Buffer/Driver
74AC125DB	ETC	获取价格	4-Bit Buffer/Driver