5秒后页面跳转
捷配首页

Datasheet > 暂无类别数据> 74AC11373NT
74AC11373NT PDF预览

74AC11373NT

更新时间： 2024-01-25 00:36:41
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
7页 118K
描述
OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

阅读下载

获取价格

74AC11373NT 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Contact Manufacturer零件包装代码：DIP
包装说明：DIP,针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.67Is Samacsys：N
系列：ACJESD-30 代码：R-PDIP-T24
JESD-609代码：e0长度：31.64 mm
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：11.3 ns认证状态：Not Qualified
座面最大高度：5.08 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

74AC11373NT 数据手册

 浏览型号74AC11373NT的Datasheet PDF文件第2页浏览型号74AC11373NT的Datasheet PDF文件第3页浏览型号74AC11373NT的Datasheet PDF文件第4页浏览型号74AC11373NT的Datasheet PDF文件第5页浏览型号74AC11373NT的Datasheet PDF文件第6页浏览型号74AC11373NT的Datasheet PDF文件第7页 
74AC11373  
OCTAL TRANSPARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
SCAS213A – MAY 1987 – REVISED APRIL 1996  
DB, DW, OR NT PACKAGE  
(TOP VIEW)  
Eight Latches in a Single Package  
3-State Bus-Driving True Outputs  
Full Parallel Access for Loading  
Buffered Control Inputs  
1Q  
2Q  
OE  
1D  
2D  
3D  
4D  
V
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
3Q  
3
Flow-Through Architecture Optimizes  
PCB Layout  
4Q  
4
GND  
GND  
GND  
GND  
5Q  
5
Center-Pin V  
Minimize High-Speed Switching Noise  
and GND Configurations  
CC  
6
CC  
7
V
CC  
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
8
5D  
6D  
7D  
8D  
LE  
9
500-mA Typical Latch-Up Immunity at  
125°C  
10  
11  
12  
6Q  
7Q  
8Q  
Package Options Include Plastic  
Small-Outline (DW) and Shrink  
Small-Outline (DB) Packages, and Standard  
Plastic 300-mil DIPs (NT)  
description  
This 8-bit latch features 3-state outputs designed specifically for driving highly-capacitive or relatively  
low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers.  
The eight latches of the 74AC11373 are transparent D-type latches. While the latch-enable (LE) input is high,  
the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up  
at the D inputs.  
OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a  
high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.  
The high-impedance third state and increased drive provide the capability to drive bus lines in a bus-organized  
system without need for interface or pullup components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are off.  
The 74AC11373 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

下载PDF

与74AC11373NT相关器件

型号 品牌 描述 获取价格 数据表
74AC11374 TI OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS

获取价格
74AC11374_14 TI OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS

获取价格
74AC11374D YAGEO Bus Driver, AC Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24

获取价格
74AC11374DB TI OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS

获取价格
74AC11374DBLE TI Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 24-SSOP -40 to 85

获取价格
74AC11374DBR TI Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 24-SSOP -40 to 85

获取价格

与74AC11373NT相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证