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74AC109FCQR PDF预览

74AC109FCQR

更新时间: 2024-09-16 07:45:03
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
10页 183K
描述
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, CERAMIC, FP-16

74AC109FCQR 数据手册

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February 1993  
54AC/74AC109 54ACT/74ACT109  
#
Dual JK Positive Edge-Triggered Flip-Flop  
General Description  
The ’AC/’ACT109 consists of two high-speed completely  
independent transition clocked JK flip-flops. The clocking  
operation is independent of rise and fall times of the clock  
waveform. The JK design allows operation as a D flip-flop  
(refer to ’AC/’ACT74 data sheet) by connecting the J and K  
inputs together.  
Clear and Set are independent of clock  
Simultaneous LOW on C and S makes both Q and Q  
HIGH  
D
D
Features  
Y
CC  
I
reduced by 50%  
Asynchronous Inputs:  
Y
Y
Y
Outputs source/sink 24 mA  
LOW input to S (Set) sets Q to HIGH level  
D
’ACT109 has TTL-compatible inputs  
Standard Military Drawing (SMD)  
Ð ’AC109: 5962-89551  
LOW input to C (Clear) sets Q to LOW level  
D
Ð ’ACT109: 5962-88534  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP, Flatpak and SOIC  
TL/F/9923–1  
TL/F/9923–2  
IEEE/IEC  
TL/F/9923–3  
Pin Assignment  
for LCC  
TL/F/9923–7  
Pin Names  
Description  
Data Inputs  
J , J , K , K  
1
1
2
2
TL/F/9923–4  
CP , CP  
1
Clock Pulse Inputs  
Direct Clear Inputs  
Direct Set Inputs  
Outputs  
2
C
, C  
D1 D2  
S
, S  
D1 D2  
Q , Q , Q , Q  
2
1
2
1
FACTTM is a trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9923  
RRD-B30M75/Printed in U. S. A.  

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