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72V3641L15PFG PDF预览

72V3641L15PFG

更新时间: 2024-11-24 01:08:23
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
20页 394K
描述
3.3 VOLT CMOS SyncFIFO

72V3641L15PFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TQFP
包装说明:LFQFP,针数:120
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.58
Samacsys Description:TQFP 14.0 X 14.0 X 1.4 MM最长访问时间:10 ns
其他特性:MAILBOX周期时间:15 ns
JESD-30 代码:S-PQFP-G120JESD-609代码:e3
长度:14 mm内存密度:36864 bit
内存宽度:36湿度敏感等级:3
功能数量:1端子数量:120
字数:1024 words字数代码:1000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:1KX36
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.6 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.4 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:14 mmBase Number Matches:1

72V3641L15PFG 数据手册

 浏览型号72V3641L15PFG的Datasheet PDF文件第2页浏览型号72V3641L15PFG的Datasheet PDF文件第3页浏览型号72V3641L15PFG的Datasheet PDF文件第4页浏览型号72V3641L15PFG的Datasheet PDF文件第5页浏览型号72V3641L15PFG的Datasheet PDF文件第6页浏览型号72V3641L15PFG的Datasheet PDF文件第7页 
3.3 VOLT CMOS SyncFIFOTM  
512 x 36  
1,024 x 36  
IDT72V3631  
IDT72V3641  
Available in space-saving 120-pin thin quad flat package (TQFP)  
Pin and functionally compatible versions of the 5V operating  
IDT723631/723641  
Easily expandable in width and depth  
Green parts are available, see ordering information  
FEATURES  
Storage capacity:  
IDT72V3631 - 512 x 36  
IDT72V3641 - 1,024 x 36  
Supports clock frequencies up to 67 MHz  
Fast access times of 10ns  
DESCRIPTION  
Free-running CLKA and CLKB can be asynchronous or coinci-  
dent (permits simultaneous reading and writing of data on a  
single clock edge)  
Clocked FIFO buffering data from Port A to Port B  
Synchronous read retransmit capability  
Mailbox register in each direction  
Programmable Almost-Full and Almost-Empty flags  
Microprocessor interface control logic  
Input Ready (IR) and Almost-Full (AF) flags synchronized by  
CLKA  
Output Ready (OR) and Almost-Empty (AE) flags synchronized  
by CLKB  
TheIDT72V3631/72V3641arepinandfunctionallycompatibleversonsof  
theIDT723631/723641,designedtorunoffa3.3Vsupplyforexceptionallylow-  
power consumption. These devices are monolithic high-speed, low-power,  
CMOSclockedFIFOmemory. Itsupportsclockfrequenciesupto67MHzand  
hasreadaccesstimesasfastas10ns. The512/1,024x36dual-portSRAM  
FIFO buffers data from port A to Port B. The FIFO memory has retransmit  
capability,whichallowspreviouslyreaddatatobeaccessedagain. TheFIFO  
operatesinFirstWordFallThroughmodeandhasflagstoindicateemptyand  
fullconditionsandconditionsandtwoprogrammableflags(Almost-Fulland  
Almost-Empty)toindicatewhenaselectednumberofwordsisstoredinmemory.  
FUNCTIONAL BLOCK DIAGRAM  
MBF1  
Mail 1  
Register  
CLKA  
CSA  
W/RA  
ENA  
MBA  
Port-A  
Control  
Logic  
RAM ARRAY  
512 x 36  
1,024 x 36  
Reset  
Logic  
RST  
RTM  
36  
Read  
Pointer  
Write  
Pointer  
RFM  
A0 - A35  
B0 - B35  
Status Flag  
OR  
AE  
IR  
AF  
Logic  
Flag Offset  
Registers  
FS0/SD  
FS1/SE  
N
10  
CLKB  
CSB  
W/RB  
ENB  
MBB  
Port-B  
Control  
Logic  
Mail 2  
Register  
4658 drw 01  
MBF2  
CIDTOandMtheMIDTEloRgoCareIrAegiLsteredTtrEadeMmaPrkoEfInRteAgraTtedUDeRvicEeTechRnoAlogNy, IGnc.ESyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.  
JUNE 2014  
1
2014 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-4658/4  
©

72V3641L15PFG 替代型号

型号 品牌 替代类型 描述 数据表
72V3641L15PFG8 IDT

完全替代

3.3 VOLT CMOS SyncFIFO
IDT72V3641L15PF IDT

完全替代

3.3 VOLT CMOS SyncFIFOTM
IDT72V3641L20PF IDT

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3.3 VOLT CMOS SyncFIFOTM

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