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72V3641L20PF PDF预览

72V3641L20PF

更新时间: 2024-11-27 05:37:27
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
21页 220K
描述
TQFP-120, Tray

72V3641L20PF 数据手册

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3.3 VOLT CMOS SyncFIFOTM  
512 x 36  
1,024 x 36  
IDT72V3631  
IDT72V3641  
IDT72V3651  
2,048 x 36  
Available in 132-pin plastic quad flat package (PQFP) or space-  
saving 120-pin thin quad flat package (TQFP)  
Pin and functionally compatible versions of the 5V operating  
IDT723631/723641/723651  
FEATURES  
Storage capacity:  
IDT72V3631 - 512 x 36  
IDT72V3641 - 1,024 x 36  
IDT72V3651 - 2,048 x 36  
Easily expandable in width and depth  
Industrial temperature range (–40°C to +85°C) is available  
Supports clock frequencies up to 67 MHz  
Fast access times of 10ns  
Free-running CLKA and CLKB can be asynchronous or coinci-  
dent (permits simultaneous reading and writing of data on a  
single clock edge)  
Clocked FIFO buffering data from Port A to Port B  
Synchronous read retransmit capability  
Mailbox register in each direction  
Programmable Almost-Full and Almost-Empty flags  
Microprocessor interface control logic  
Input Ready (IR) and Almost-Full (AF) flags synchronized by  
CLKA  
DESCRIPTION  
TheIDT72V3631/72V3641/72V3651arepinandfunctionallycompatible  
versonsoftheIDT723631/723641/723651,designedtorunoffa3.3Vsupply  
forexceptionallylow-powerconsumption. Thesedevicesaremonolithichigh-  
speed,low-power,CMOSclockedFIFOmemory. Itsupportsclockfrequencies  
upto67MHzandhasreadaccesstimesasfastas10ns. The512/1,024/2,048  
x36dual-portSRAMFIFObuffersdatafromportAtoPortB. TheFIFOmemory  
has retransmitcapability, whichallows previouslyreaddata tobe accessed  
again. The FIFOoperates inFirstWordFallThroughmode andhas flags to  
indicateemptyandfullconditionsandconditionsandtwoprogrammableflags  
(Almost-FullandAlmost-Empty)toindicatewhenaselectednumberofwords  
isstoredinmemory. Communicationbetweeneachportmaytakeplacewith  
Output Ready (OR) and Almost-Empty (AE) flags synchronized  
by CLKB  
FUNCTIONAL BLOCK DIAGRAM  
MBF1  
Mail 1  
Register  
CLKA  
CSA  
W/RA  
ENA  
MBA  
Port-A  
Control  
Logic  
RAM ARRAY  
512 x 36  
1,024 x 36  
2,048 x 36  
Reset  
Logic  
RST  
RTM  
36  
Read  
Pointer  
Write  
Pointer  
RFM  
A
0
- A35  
B0 - B35  
Status Flag  
OR  
AE  
IR  
AF  
Logic  
Flag Offset  
Registers  
FS  
0
/SD  
FS /SEN  
1
10  
CLKB  
CSB  
W/RB  
ENB  
MBB  
Port-B  
Control  
Logic  
Mail 2  
Register  
4658 drw 01  
MBF2  
IDTandtheIDTlogoaretrademarkofIntegratedDeviceTechnology, Inc. SyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.  
COMMERCIAL TEMPERATURE RANGE  
NOVEMBER 2003  
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-4658/2  

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