Datasheet > 723643L15PFG8

723643L15PFG8

更新时间： 2024-01-05 02:26:42

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片配套器件
页数	文件大小	规格书
28页	463K
描述
CMOS BUS-MATCHING SyncFIFO

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数据手册

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723643L15PFG8 数据手册

CMOS BUS-MATCHING SyncFIFO^TM

256 x 36, 512 x 36, 1,024 x 36

IDT723623

IDT723633

IDT723643

• Reset clears data and configures FIFO, Partial Reset clears data

but retains configuration settings

• Mailbox bypass registers for each FIFO

• Free-running CLKA and CLKB may be asynchronous or

coincident (simultaneous reading and writing of data on a single

clock edge is permitted)

FEATURES:

• Memory storage capacity:

IDT723623

IDT723633

IDT723643

–

256 x 36

512 x 36

1,024 x 36

• Clocked FIFO buffering data from Port A to Port B

• Clock frequencies up to 83 MHz (8 ns access time)

• IDT Standard timing (using EF and FF) or First Word Fall

Through Timing (using OR and IR flag functions)

• Programmable Almost-Empty and Almost-Full flags; each has

three default offsets (8, 16 and 64)

• Serial or parallel programming of partial flags

• Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits

(byte)

• Easily expandable in width and depth

• Auto power down minimizes power dissipation

• Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)

• Green parts available, see ordering information

DESCRIPTION:

TheIDT723623/723633/723643aremonolithic,high-speed,low-power,

CMOSunidirectionalSynchronous(clocked)FIFOmemorieswhichsupport

clock frequencies up to 83 MHz and have read access times as fast as 8 ns.

• Big- or Little-Endian format for word and byte bus sizes

FUNCTIONAL BLOCK DIAGRAM

MBF1

Mail 1

CLKA

CSA

W/RA

ENA

Port-A

Control

Logic

MBA

RAM ARRAY

256 x 36

FIFO1

Mail1,

Mail2,

Reset

Logic

RS1

RS2

PRS

512 x 36

1,024 x 36

Write

Pointer

Read

Pointer

A0-A35

B0-B35

Status Flag

Logic

EF/OR

FF/IR

SPM

FS0/SD

FS1/SEN

Programmable Flag

Offset Registers

Timing

Mode

FWFT

CLKB

CSB

W/RB

ENB

MBB

Port-B

Control

Logic

SIZE

Mail 2

3269 drw01

MBF2

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.SyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.

COMMERCIAL TEMPERATURE RANGE

MARCH 2014

DSC-3269/5

12 3 4 5 6 7...28

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与723643L15PFG8相关器件

型号	品牌	获取价格	描述	数据表
723644L15PFG	IDT	获取价格	FIFO
723644L15PFG8	IDT	获取价格	FIFO
723644L20PF	IDT	获取价格	Bi-Directional FIFO, 2KX36, 12ns, Synchronous, CMOS, PQFP128
723644L20PFI	IDT	获取价格	Bi-Directional FIFO, 2KX36, 12ns, Synchronous, CMOS, PQFP128
723644L30PF	IDT	获取价格	Bi-Directional FIFO, 2KX36, 15ns, Synchronous, CMOS, PQFP128
7236-45	MOLEX	获取价格	Barrier Strip Terminal Block, 25A, 1 Row(s), 1 Deck(s)
723646L12PF	IDT	获取价格	TQFP-128, Tray
723646L12PFG	IDT	获取价格	FIFO, 1KX36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128
723646L15PFG	IDT	获取价格	FIFO, 1KX36, 10ns, Synchronous, CMOS, PQFP128, TQFP-128
723646L20PF	IDT	获取价格	Bi-Directional FIFO, 2KX36, 12ns, Synchronous, CMOS, PQFP128