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71V016SA15PH PDF预览

71V016SA15PH

更新时间: 2024-11-24 10:08:55
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管
页数 文件大小 规格书
9页 907K
描述
Standard SRAM, 64KX16, 15ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

71V016SA15PH 数据手册

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IDT71V016SA/HSA  
3.3V CMOS Static RAM  
1 Meg (64K x 16-Bit)  
Features  
Description  
64K x 16 advanced high-speed CMOS Static RAM  
TheIDT71V016isa1,048,576-bithigh-speedStaticRAMorganized  
as64Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability  
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-  
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-  
speedmemoryneeds.  
Equal access and cycle times  
— Commercial:10/12/15/20ns  
Industrial:12/15/20ns  
One Chip Select plus one Output Enable pin  
Bidirectional data inputs and outputs directly  
The IDT71V016 has an output enable pin which operates as fast  
as 5ns, with address access times as fast as 10ns. All bidirectional  
inputsandoutputsoftheIDT71V016areLVTTL-compatibleandoperation  
isfromasingle3.3Vsupply.Fullystaticasynchronouscircuitryisused,  
requiringnoclocks orrefreshforoperation.  
LVTTL-compatible  
Low power consumption via chip deselect  
Upper and Lower Byte Enable Pins  
Single 3.3V power supply  
Available in 44-pin Plastic SOJ, 44-pin TSOP, and  
The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic  
SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.  
48-Ball Plastic FBGA packages  
Functional Block Diagram  
Output  
Enable  
Buffer  
OE  
Address  
Buffers  
Row / Column  
Decoders  
A0 – A15  
I/O15  
High  
8
8
Chip  
Enable  
Buffer  
Byte  
CS  
I/O  
Buffer  
I/O8  
Sense  
Amps  
and  
Write  
Drivers  
16  
64K x 16  
Memory  
Array  
Write  
Enable  
Buffer  
WE  
I/O7  
I/O0  
Low  
Byte  
I/O  
8
8
Buffer  
BHE  
BLE  
Byte  
Enable  
Buffers  
3834 drw 01  
OCTOBER 2008  
1
©2007 IntegratedDeviceTechnology,Inc.  
DSC-3834/10  

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