Datasheet > 70V7319

70V7319

更新时间： 2023-12-20 18:44:14

品牌	Logo	应用领域
瑞萨 - RENESAS		静态存储器
页数	文件大小	规格书
23页	539K
描述
256K x 18 Synchronous Bank-Switchable Dual-Port SRAM

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70V7319 数据手册

70V7319S

High-Speed 256K x 18 Synchronous Bank-Switchable Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range⁽⁵⁾(VDD = 3.3V ± 150mV)

70V7319S200⁽⁷⁾70V7319S166⁽⁶⁾

70V7319S133

Com'l

Com'l Only

Typ.⁽⁴⁾

815

Com'l

& Ind

Symbol

Parameter

Test Condition

Version

COM'L

Max.

950

Typ.⁽⁴⁾

Max.

790

830

340

355

640

660

Typ.⁽⁴⁾

550

250

460

Max. Unit

IDD

Dynamic Operating

Current (Both

Ports Active)

and CER= VIL,

675

275

515

645

675

295

310

520

545

Outputs Disabled,

____

(1)

IND

f = fMAX

ISB1

Standby Current

(Both Ports - TTL

Level Inputs)

f = fMAX

= CE

= VIH

COM'L

IND

340

410

(1)

____

(3)

ISB2

Standby Current

(One Port - TTL

Level Inputs)

CE^"A"= VIL and CE"B" = VIH

COM'L

IND

690

770

Active Port Outputs Disabled,

____

(1)

f=fMAX

ISB3

Full Standby Current

(Both Ports - CMOS

Level Inputs)

Both Ports CE

IN > VDDQ - 0.2V or VIN < 0.2V,

f = 0⁽²⁾

L and CER > VDDQ - 0.2V,

COM'L

IND

____

CE^"A"< 0.2V and CE"B" > VDDQ - 0.2V⁽⁵⁾

IN > VDDQ - 0.2V or VIN < 0.2V,

ISB4

Full Standby Current

(One Port - CMOS

Level Inputs)

COM'L

IND

690

770

515

640

660

460

520

545

Active Port, Outputs Disabled,

____

(1)

f = fMAX

5629 tbl 09

NOTES:

1. Atf=fMAX,addressandcontrollines(exceptOutputEnable)arecyclingatthemaximumfrequencyclockcycleof1/tCYC,using"ACTESTCONDITIONS"atinputlevelsofGNDto3V.

2. f=0meansnoaddress,clock,orcontrollineschange.AppliesonlytoinputatCMOSlevelstandby.

3. Port"A"maybeeitherleftorright port.Port"B"istheoppositefromport"A".

4. VDD =3.3V,TA =25°C forTyp,andarenotproductiontested.IDDDC(f=0)=120mA(Typ).

5. CEX = VIL means CE0X = VIL and CE1X = VIH

CEX = VIH means CE0X = VIH or CE1X = VIL

CEX < 0.2V meansCE0X< 0.2V and CE1X > VDDQ - 0.2V

CEX > VDDQ - 0.2V means CE0X > VDDQ - 0.2V or CE1X < 0.2V

"X"represents"L"forleftportor"R"forrightport.

6. 166MHzIndustrialTemperaturenotavailableinBF-208package.

7. ThisspeedgradeavailablewhenVDDQ =3.3.Vforaspecificport(i.e.,OPTx=VIH).ThisspeedgradeavailableinBC-256packageonly.

6.42

1...5 6 789 10 11...23

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