Datasheet > 70V7319

70V7319

更新时间： 2023-12-20 18:44:14

品牌	Logo	应用领域
瑞萨 - RENESAS		静态存储器
页数	文件大小	规格书
23页	539K
描述
256K x 18 Synchronous Bank-Switchable Dual-Port SRAM

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70V7319 数据手册

70V7319S

High-Speed 256K x 18 Synchronous Bank-Switchable Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

Truth Table I—Read/Write and Enable Control^(1,2,3,4)

Upper Byte

I/O9-17

Lower Byte

I/O^0-8

OE³

CLK

↑

R/W

MODE

Deselected–Power Down

High-Z

Deselected–Power Down

All Bytes Deselected

Write to Lower Byte Only

Write to Upper Byte Only

Write to both Bytes

↑

DIN

↑

DIN

High-Z

↑

DIN

↑

High-Z

DOUT

Read Lower Byte Only

Read UpperByte Only

Read both Bytes

↑

OUT

High-Z

↑

DOUT

↑

High-Z

Outputs Disabled

5629 tbl 02

NOTES:

1. "H" = VIH, "L" = VIL, "X" = Don't Care.

2. ADS,CNTEN,REPEATaresetasappropriateforaddressaccess.RefertoTruthTableIIfordetails.

3. OEisanasynchronousinputsignal.

4. Itispossibletoreadorwriteanycombinationofbytesduringagivenaccess.Afewrepresentativesampleshavebeenillustratedhere.

Truth Table II—Address and Address Counter Control^(1,2,7)

Address

Addr

Used

Address

CLK

↑

I/O⁽³⁾

I/O (n) External Address Used

I/O(n+1) Counter Enabled—Internal Address generation

I/O(n+1) External Address Blocked—Counter disabled (An + 1 reused)

I/O(0) Counter Set to last valid ADS load

MODE

ADS CNTEN REPEAT⁽⁶⁾

L⁽⁴⁾

An + 1

L⁽⁵⁾

↑

An + 1

↑

L⁽⁴⁾

↑

5629 tbl 03

NOTES:

1. "H" = VIH, "L" = VIL, "X" = Don't Care.

2. ReadandwriteoperationsarecontrolledbytheappropriatesettingofR/W,CE0,CE1,UB/LBandOE.

3. Outputsconfiguredinflow-throughoutputmode:ifoutputsareinpipelinedmodethedataoutwillbedelayedbyonecycle.

4. ADSandREPEATareindependentofallothermemorycontrolsignalsincludingCE⁰,CE1 andUB/LB

5. TheaddresscounteradvancesifCNTEN=VILontherisingedgeofCLK,regardlessofallothermemorycontrolsignalsincludingCE0,CE1,UB/LB.

6. WhenREPEATisasserted,thecounterwillresettothelastvalidaddressloadedviaADS.Thisvalueisnotsetatpower-up:aknownlocationshouldbeloadedviaADSduringinitialization

ifdesired.AnysubsequentADSaccessduringoperationswillupdatetheREPEATaddresslocation.

7. Thecounterincludesbankaddressandinternaladdress.Thecounterwilladvanceacrossbankboundaries.Forexample,ifthecounterisinBank0,ataddressFFFh,andisadvancedone

location,itwillmovetoaddress0hinBank1.Bythesametoken,thecounteratFFFhinBank63willadvanceto0hinBank0.RefertoTimingWaveformofCounterRepeat,page17.Care

shouldbetakenduringoperationtoavoidhavingbothcounterspointtothesamebank(i.e.,ensureBA0L -BA5L ≠BA0R-BA5R),asthisconditionwillinvalidatetheaccessforbothports.

Pleaserefertothefunctionaldescriptiononpage18fordetails.

6.42

1 2 3 456 7 8...23

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