Datasheet > 70T653MS15BCGI8

70T653MS15BCGI8

更新时间： 2024-09-19 00:58:19

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
24页	705K
描述
HIGH-SPEED 2.5V 512K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM

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数据手册

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70T653MS15BCGI8 数据手册

HIGH-SPEED 2.5V

512K x 36

IDT70T653M

ASYNCHRONOUS DUAL-PORT

STATIC RAM

WITH 3.3V 0R 2.5V INTERFACE

Features

◆

True Dual-Port memory cells which allow simultaneous

access of the same memory location

High-speed access

Full on-chip hardware support of semaphore signaling

between ports

◆

Fully asynchronous operation from either port

Separate byte controls for multiplexed bus and bus

matching compatibility

– Commercial:10/12/15ns(max.)

– Industrial: 12ns (max.)

◆

RapidWrite Mode simplifies high-speed consecutive write

cycles

Sleep Mode Inputs on both ports

Single 2.5V (±100mV) power supply for core

LVTTL-compatible, selectable 3.3V (±150mV)/2.5V (±100mV)

power supply for I/Os and control signals on each port

Includes JTAG functionality

Dual chip enables allow for depth expansion without

external logic

◆

IDT70T653M easily expands data bus width to 72 bits or

more using the Busy Input when cascading more than one

device

Available in a 256-ball Ball Grid Array

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

◆

Busy input for port contention management

Interrupt Flags

◆

Green parts available, see ordering information

Functional Block Diagram

BE3L

BE3R

BE2R

BE2L

BE1L

BE0L

BE1R

BE0R

B B B B B B B B

E E E E E E E E

3 2 1 0

R R R R

CE0L

CE1L

CE0R

CE1R

OEL

Dout0-8_L

Dout0-8_R

Dout9-17_L

Dout9-17_R

Dout18-26_R

Dout27-35_R

Dout18-26_L

Dout27-35_L

512K x 36

MEMORY

ARRAY

I/O0L- I/O35L

Di n_L

Di n_R

I/O0R -I/O35R

18R

18L

Address

Decoder

Address

Decoder

ADDR_L

ADDR_R

CE0L

CE1L

ARBITRATION

CE0R

CE1R

TDI

TCK

TMS

TRST

INTERRUPT

SEMAPHORE

LOGIC

JTAG

TDO

R/W

BUSY

SEM

BUSY

SEM

(1)

INTL

INT

(2)

ZZR

CONTROL

LOGIC

ZZL

NOTES:

1. INT is non-tri-state totem-pole outputs (push-pull).

2. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when asserted. OPTx, INTx and the sleep mode

5679 drw 01

pins themselves (ZZx) are not affected during sleep mode.

JUNE 2015

DSC-5679/6

12 3 4 5 6 7...24

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与70T653MS15BCGI8相关器件

型号	品牌	获取价格	描述	数据表
70T659	RENESAS	获取价格	128K x 36 Async, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's
70T659S10BCG	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10BCG8	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10BCGI	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10BCGI8	IDT	获取价格	Application Specific SRAM, 128KX36, 10ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM
70T659S10BFG	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10BFG8	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10BFGI	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10BFGI8	IDT	获取价格	HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
70T659S10DRG	IDT	获取价格	Dual-Port SRAM, 128KX36, 10ns, CMOS, PQFP208, 28 X 28 MM, 3.50 MM PITCH, GREEN, PLASTIC, Q

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