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5V993A-2QC PDF预览

5V993A-2QC

更新时间: 2024-12-01 19:59:39
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
8页 118K
描述
Clock Driver, PDSO28

5V993A-2QC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SSOP, SSOP28,.25Reach Compliance Code:not_compliant
风险等级:5.92JESD-30 代码:R-PDSO-G28
JESD-609代码:e0最大I(ol):0.012 A
湿度敏感等级:1端子数量:28
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH电源:3.3 V
认证状态:Not Qualified子类别:Clock Drivers
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

5V993A-2QC 数据手册

 浏览型号5V993A-2QC的Datasheet PDF文件第2页浏览型号5V993A-2QC的Datasheet PDF文件第3页浏览型号5V993A-2QC的Datasheet PDF文件第4页浏览型号5V993A-2QC的Datasheet PDF文件第5页浏览型号5V993A-2QC的Datasheet PDF文件第6页浏览型号5V993A-2QC的Datasheet PDF文件第7页 
3.3V PROGRAMMABLE  
SKEW PLL CLOCK DRIVER  
TURBOCLOCK™  
IDT5V993A  
FEATURES:  
DESCRIPTION  
REF input is 5V tolerant  
The IDT5V993Ais a highfanout3.3VPLLbasedclockdriverintended  
forhighperformancecomputinganddata-communicationsapplications.A  
keyfeatureoftheprogrammableskewistheabilityofoutputstoleadorlag  
theREFinputsignal.TheIDT5V993Ahassixprogrammableskewoutputs  
andtwozeroskewoutputs.Skewiscontrolledby3-levelinputsignalsthat  
may be hard-wired to appropriate HIGH-MID-LOW levels.  
3pairs ofprogrammable skewoutputs  
Low skew: 200ps same pair, 250ps all outputs  
Selectable positive ornegative edge synchronization:  
ExcellentforDSPapplications  
Synchronous outputenable  
Outputfrequency: 3.75MHzto85MHz  
2x, 4x, 1/2, and 1/4 outputs  
3 skew grades:  
Whenthe GND/sOE pinis heldlow,allthe outputs are synchronously  
enabled.However,ifGND/sOEisheldhigh,alltheoutputsexcept3Q0and  
3Q1 are synchronously disabled.  
IDT5V993A-2:tSKEW0<250ps  
IDT5V993A-5:tSKEW0<500ps  
IDT5V993A-7:tSKEW0<750ps  
3-level inputs for skew and PLL range control  
PLL bypass for DC testing  
Externalfeedback,internalloopfilter  
12mAbalanceddrive outputs  
Furthermore, when the VCCQ/PE is held high, all the outputs are  
synchronizedwiththe positive edge ofthe REFclockinput.WhenVCCQ/  
PEis heldlow,allthe outputs are synchronizedwiththe negative edge of  
REF. BothdeviceshaveLVTTLoutputswith12mAbalanceddriveoutputs.  
LowJitter: <200ps peak-to-peak  
Industrialtemperaturerange  
Available in28-pinQSOPPackage  
FUNCTIONALBLOCKDIAGRAM  
GND/sOE  
1Q0  
Skew  
Select  
1Q1  
3
3
3
3
1F1:0  
2F1:0  
3F1:0  
VCCQ/PE  
2Q0  
2Q1  
Skew  
Select  
3
REF  
PLL  
FB  
3Q0  
3Q1  
Skew  
Select  
3
3
FS  
4Q0  
4Q1  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
AUGUST 2000  
1
c
2000 Integrated Device Technology, Inc.  
DSC 5408  

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