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5962R9665502VXC PDF预览

5962R9665502VXC

更新时间: 2024-09-16 20:15:35
品牌 Logo 应用领域
瑞萨 - RENESAS 输入元件逻辑集成电路
页数 文件大小 规格书
26页 145K
描述
4000/14000/40000 SERIES, QUAD 2-INPUT AND GATE, CDFP14, CERAMIC, DFP-14

5962R9665502VXC 技术参数

生命周期:Transferred零件包装代码:DFP
包装说明:DFP, FL14,.3针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.4Is Samacsys:N
其他特性:RADIATION HARDENED系列:4000/14000/40000
JESD-30 代码:R-CDFP-F14JESD-609代码:e4
长度:9.525 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE最大I(ol):0.00064 A
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DFP封装等效代码:FL14,.3
封装形状:RECTANGULAR封装形式:FLATPACK
电源:5/15 VProp。Delay @ Nom-Sup:338 ns
传播延迟(tpd):338 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:MIL-PRF-38535 Class V
座面最大高度:2.92 mm子类别:Gate
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:GOLD端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
总剂量:100k Rad(Si) V宽度:6.285 mm
Base Number Matches:1

5962R9665502VXC 数据手册

 浏览型号5962R9665502VXC的Datasheet PDF文件第2页浏览型号5962R9665502VXC的Datasheet PDF文件第3页浏览型号5962R9665502VXC的Datasheet PDF文件第4页浏览型号5962R9665502VXC的Datasheet PDF文件第5页浏览型号5962R9665502VXC的Datasheet PDF文件第6页浏览型号5962R9665502VXC的Datasheet PDF文件第7页 
REVISIONS  
LTR  
DESCRIPTION  
DATE (YR-MO-DA)  
APPROVED  
A
B
C
Changes in accordance with NOR 5962-R181-97. - cs  
97-02-24  
97-08-08  
03-10-10  
Monica L. Poelking  
Raymond Monnin  
Thomas M. Hess  
Changes in accordance with NOR 5962-R434-97. – rc  
Update boilerplate to MIL-PRF-38535 requirements. Editorial changes  
throughout. – jak  
REV  
SHEET  
REV  
C
C
C
C
C
C
C
21  
C
C
22  
C
C
23  
C
C
24  
C
C
25  
C
SHEET  
15  
16  
17  
18  
19  
20  
REV STATUS  
OF SHEETS  
PMIC N/A  
REV  
C
6
C
7
C
8
C
9
C
C
C
C
C
SHEET  
1
2
3
4
5
10  
11  
12  
13  
14  
PREPARED BY  
Dan. Wonnell  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216  
CHECKED BY  
Monica L. Poelking  
STANDARD  
MICROCIRCUIT  
DRAWING  
http://www.dscc.dla.mil  
THIS DRAWING IS AVAILABLE  
FOR USE BY ALL  
DEPARTMENTS  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
APPROVED BY  
MICROCIRCUIT, DIGITAL, RADIATION  
HARDENED, CMOS, AND GATE,  
MONOLITHIC SILICON  
Monica L. Poelking  
DRAWING APPROVAL DATE  
95-11-07  
AMSC N/A  
REVISION LEVEL  
C
SIZE  
CAGE CODE  
5962-96655  
A
67268  
SHEET  
1
OF  
25  
DSCC FORM 2233  
APR 97  
5962-E431-03  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  

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