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5962-9315402HXX PDF预览

5962-9315402HXX

更新时间: 2024-01-29 22:34:14
品牌 Logo 应用领域
美高森美 - MICROSEMI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器内存集成电路
页数 文件大小 规格书
13页 678K
描述
EEPROM Module, 128KX8, 150ns, Parallel, CMOS, CDIP32, HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-32

5962-9315402HXX 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknown风险等级:5.31
最长访问时间:150 ns其他特性:10000 WRITE ENDURANCE CYCLES; 10 YEARS OF DATA RETENTION
数据保留时间-最小值:10耐久性:10000 Write/Erase Cycles
JESD-30 代码:R-CDIP-T32内存密度:1048576 bit
内存集成电路类型:EEPROM MODULE内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:128KX8
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified筛选级别:MIL-PRF-38534 Class H
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL最长写入周期时间 (tWC):10 ms

5962-9315402HXX 数据手册

 浏览型号5962-9315402HXX的Datasheet PDF文件第3页浏览型号5962-9315402HXX的Datasheet PDF文件第4页浏览型号5962-9315402HXX的Datasheet PDF文件第5页浏览型号5962-9315402HXX的Datasheet PDF文件第7页浏览型号5962-9315402HXX的Datasheet PDF文件第8页浏览型号5962-9315402HXX的Datasheet PDF文件第9页 
WE512K8, WE256K8,  
WE128K8-XCX  
White Electronic Designs  
WRITE  
WRITE CYCLE TIMING  
Write operations are initiated when both CS# and WE#  
Figures 6 and 7 show the write cycle timing relationships.  
Awrite cycle begins with address application, write enable  
and chip select. Chip select is accomplished by placing  
the CS# line low. Write enable consists of setting the WE  
line low. The write cycle begins when the last of either CS#  
or WE# goes low.  
are low and OE# is high. The EEPROM devices support  
both a CS# and WE# controlled write cycle. The address is  
latched by the falling edge of either CS# or WE#, whichever  
occurs last.  
The data is latched internally by the rising edge of either  
CS# or WE#, whichever occurs rst.Abyte write operation  
will automatically continue to completion.  
The WE# line transition from high to low also initiates  
an internal 150μsec delay timer to permit page mode  
operation. Each subsequent WE# transition from high to  
low that occurs before the completion of the 150μsec time  
out will restart the timer from zero. The operation of the  
timer is the same as a retriggerable one-shot.  
AC WRITE CHARACTERISTICS  
VCC = 5.0V, VSS = 0V, -55°C TA +125°C  
512K x 8  
Symbol  
256K x 8  
128K x 8  
Parameter  
Unit  
Min  
Max  
Min  
Max  
10  
Min  
Max  
10  
Write Cycle Time, TYP = 6mS  
Address Set-up Time  
Write Pulse Width (WE# or CS#)  
Chip Select Set-up Time  
Address Hold Time (1)  
Data Hold Time  
tWC  
tAS  
10  
ms  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
10  
150  
0
30  
150  
0
30  
150  
0
tWP  
tCS  
tAH  
125  
10  
0
50  
0
50  
0
tDH  
Chip Select Hold Time  
Data Set-up Time  
tCH  
0
0
tDS  
100  
10  
10  
50  
100  
30  
0
100  
30  
0
Output Enable Set-up Time  
Output Enable Hold Time  
Write Pulse Width High  
NOTES:  
tOES  
tOEH  
tWPH  
50  
50  
1. A17 and A18 must remain valid through WE# and CS# low pulse, for 512K x 8.  
A15, A16, and A17 must remain valid through WE# and CS# low pulse, for 256K x 8.  
A15 and A16 must remain valid through WE# and CS# low pulse, for 128K x 8.  
White Electronic Designs Corp. reserves the right to change products or specications without notice.  
March 2007  
Rev. 2  
6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  

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