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530CB10M000DG PDF预览

530CB10M000DG

更新时间: 2024-10-29 08:04:59
品牌 Logo 应用领域
芯科 - SILICON 石英晶振振荡器
页数 文件大小 规格书
12页 216K
描述
Oscillator, 10MHz Min, 160MHz Max, 10MHz Nom

530CB10M000DG 数据手册

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Si530/531  
Table 4. CLK± Output Phase Jitter  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
0.25  
0.26  
0.36  
0.34  
Max  
0.40  
0.37  
0.50  
0.42  
Units  
Phase Jitter (RMS)*  
φJ  
12 kHz to 20 MHz (OC-48)  
50 kHz to 80 MHz (OC-192)  
12 kHz to 20 MHz (OC-48)  
50 kHz to 20 MHz (OC-192)  
ps  
for F  
> 500 MHz  
OUT  
Phase Jitter (RMS)*  
for F of 125 to 500 MHz  
φJ  
ps  
OUT  
*Note: Differential Modes: LVPECL/LVDS/CML. Refer to AN256 for further information.  
Table 5. CLK± Output Period Jitter  
Parameter  
Period Jitter*  
Symbol  
Test Condition  
RMS  
Min  
Typ  
2
Max  
Units  
J
ps  
PER  
Peak-to-Peak  
14  
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.  
Table 6. CLK± Output Phase Noise (Typical)  
Offset Frequency (f)  
120.00 MHz  
LVDS  
156.25 MHz  
LVPECL  
622.08 MHz  
LVPECL  
Units  
100 Hz  
1 kHz  
10 kHz  
100 kHz  
1 MHz  
–112  
–122  
–132  
–137  
–144  
–150  
n/a  
–105  
–122  
–128  
–135  
–144  
–147  
n/a  
–97  
–107  
–116  
–121  
–134  
–146  
–148  
dBc/Hz  
10 MHz  
100 MHz  
4
Rev. 1.1  

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