2N and SST 4117,
4118, 4119
ULTRA-HIGH INPUT IMPEDANCE
N-CHANNEL JFET
FEATURES
LOW POWER
IDSS<600 µA (2N4117)
MINIMUM CIRCUIT LOADING IGSS<1 pA (2N4117 A Series)
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
@ 25°C (unless otherwise noted)
Gate-Source or Gate-Drain Voltage (NOTE 1)
Gate-Current
-40V
50mA
Total Device Dissipation
(Derate 2mW/ºC above 25ºC)
Storage Temperature Range
Lead Temperature
300mW
-55ºC to+150ºC
SOT-23
Top View
TO-72
Top View
(1/16” from case for 10 seconds)
300ºC
ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise noted)
2N&SST 4117A
2N4117/A
2N4118
2N4119
2N&SST 4118A 2N&SST 4119A
SYMBOL
CHARACTERISTIC
MIN
--
MAX
-10
-25
-1
MIN
--
MAX
-10
-25
-1
MIN
--
MAX UNITS
CONDITIONS
-10
-25
-1
pA
nA
pA
nA
Gate Reverse Current Standard
only
IGSS
VGS =-10V VDS=0
--
--
--
150ºC
--
--
--
Gate Reverse Current
2N Series only
IGSS
VGS =-20V VDS=0
IG =-1µA VDS=0
--
-2.5
--
-2.5
--
-2.5
150ºC
Gate-Source Breakdown
Voltage
BVGSS
VGS(off)
IDSS
-40
--
-40
--
-40
--
V
Gate-Source Cutoff Voltage
Saturation Drain Current
-0.6
0.03
-1.8
-1
-3
-2
-6
VDS =10V ID=1nA
VDS =10V VGS=0
0.60
0.08
0.60
0.20
0.80
mA
(NOTE 2)
FN4117/A 0.015
Common-Source Forward
Transconductance (NOTE 2)
gfs
70
--
450
3
80
--
650
5
100
--
700
10
µS
pF
f=1kHz
Common-Source Output
Conductance
gos
VDS =10V VGS=0
Common-Source Input
Capacitance
Ciss
Crss
--
--
3
--
--
3
--
--
3
f=1MHz
Common-Source Reverse
Transfer Capacitance
1.5
1.5
1.5
NOTES:
1. Due to symmetrical geometry, these units may be operated with source and drain leads interchanged.
2. This parameter is measured during a 2 ms interval 100 ms after power is applied. (Not a JEDEC condition.)
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
5/02/2012 Rev#A4 ECN# 2N & SST 4117 4118 4119