2FAE-C15R - Integrated Passive & Active Device using CSP
Mechanical Characteristics
This is a silicon-based device and is packaged using chip scale packaging technology. Solder bumps, formed on the silicon die,
provide the interconnect medium from die to PCB. The bumps are arranged on the die in a regular grid formation. The grid pitch is
0.5 mm and the dimensions for the packaged device are shown below.
2.915 - 3.005
(0.115 - 0.118)
0.435
(0.017)
0.432 - 0.559
(0.017 - 0.022)
0.3
(0.012)
DIA.
C1
C2
C3
C4
C5
C6
1.285 - 1.375
(0.051 - 0.054)
B1
B2
B3
A1
A2
A3
A4
A5
A6
0.330 - 0.457
(0.013 - 0.018)
0.435
(0.017)
0.50
(0.020)
0.25
(0.01)
0.180 - 0.280
(0.007 - 0.011)
0.180 - 0.280
(0.007 - 0.011)
MILLIMETERS
(INCHES)
DIMENSIONS =
Reliability Data
Reliability data is gathered on an ongoing basis for Bourns® Integrated Passive and Active Devices.
“Package level” testing of the integrity of the solder joint is carried out on an independent Daisy-Chain test device. A 25-Pin Daisy
Chain component is available from Bourns for this purpose (part number 2TAD-C25R). This is a 5 x 5 array featuring 0.5 mm pitch
solder bumps. The Distance to Neutral Point (DNP) on that component is similar to that of the 2FAE-C15R and is thus deemed
suitable for Thermal Cycle testing.
“Silicon level” reliability performance is based on similarity to other integrated passive CSP devices from Bourns.
Frequency Response
0
-10
-20
-30
-40
-50
-60
0.1
1.0
10.0
100.0
1000.0
1000.0
Frequency - MHz
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.