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28LV64A30/P PDF预览

28LV64A30/P

更新时间: 2024-11-20 19:10:07
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 130K
描述
8K X 8 EEPROM 3V, 300 ns, PDIP28, PLASTIC, DIP-28

28LV64A30/P 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:PLASTIC, DIP-28针数:28
Reach Compliance Code:unknown风险等级:5.41
最长访问时间:300 nsJESD-30 代码:R-PDIP-T28
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL编程电压:3 V
认证状态:Not Qualified最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子位置:DUALBase Number Matches:1

28LV64A30/P 数据手册

 浏览型号28LV64A30/P的Datasheet PDF文件第2页浏览型号28LV64A30/P的Datasheet PDF文件第3页浏览型号28LV64A30/P的Datasheet PDF文件第4页浏览型号28LV64A30/P的Datasheet PDF文件第5页浏览型号28LV64A30/P的Datasheet PDF文件第6页浏览型号28LV64A30/P的Datasheet PDF文件第7页 
Obsolete Device  
28LV64A  
64K (8K x 8) Low Voltage CMOS EEPROM  
FEATURES  
PACKAGE TYPES  
• 2.7V to 3.6V Supply  
RDY/BSY  
A12  
A7  
• 1  
2
28 Vcc  
27 WE  
26 NC  
25 A8  
• Read Access Time—300 ns  
• CMOS Technology for Low Power Dissipation  
- 8 mA Active  
- 50 µA CMOS Standby Current  
• Byte Write Time—3 ms  
• Data Retention >200 years  
• High Endurance - Minimum 100,000 Erase/Write  
Cycles  
• Automatic Write Operation  
- Internal Control Timer  
3
A6  
4
A6  
A5  
A4  
A3  
A2  
A1 10  
A0 11  
NC 12  
I/O0 13  
5
6
7
8
9
29 A8  
28 A9  
A5  
5
24 A9  
A4  
6
23 A11  
22 OE  
21 A10  
20 CE  
19 I/O7  
18 I/O6  
17 I/O5  
16 I/O4  
15 I/O3  
27 A11  
26 NC  
25 OE  
24 A10  
23 CE  
22 I/O7  
21 I/O6  
A3  
7
A2  
8
A1  
9
A0  
10  
11  
12  
13  
I/O0  
I/O1  
I/O2  
VSS 14  
-
Auto-Clear Before Write Operation  
• Pin 1 indicator on PLCC on top of package  
- On-Chip Address and Data Latches  
• Data Polling  
• Ready/Busy  
• Chip Clear Operation  
BLOCK DIAGRAM  
I/O0...................I/O7  
• Enhanced Data Protection  
- VCC Detector  
- Pulse Filter  
VSS  
VCC  
Data Protection  
Circuitry  
Chip Enable/  
Output Enable  
Control Logic  
CE  
- Write Inhibit  
OE  
• Electronic Signature for Device Identification  
• Organized 8Kx8 JEDEC Standard Pinout  
- 28-pin Dual-In-Line Package  
- 32-pin Chip Carrier (Leadless or Plastic)  
• Available for Extended Temperature Ranges:  
- Commercial: 0°C to +70°C  
- Industrial: -40°C to +85°C  
Auto Erase/Write  
Timing  
Data  
Poll  
WE  
Input/Output  
Buffers  
Rdy/  
Busy  
Program Voltage  
Generation  
A0  
Y
I
I
I
I
I
I
I
I
Y Gating  
Decoder  
L
a
t
c
h
e
s
64K bit  
Cell Matrix  
X
DESCRIPTION  
Decoder  
I
I
I
The Microchip Technology Inc. 28LV64A is a CMOS 64K non-vol-  
atile electrically Erasable PROM organized as 8K words by 8 bits.  
The 28LV64A is accessed like a static RAM for the read or write  
cycles without the need of external components. During a “byte  
write”, the address and data are latched internally, freeing the  
microprocessor address and data bus for other operations. Fol-  
lowing the initiation of write cycle, the device will go to a busy state  
and automatically clear and write the latched data using an inter-  
nal control timer. To determine when the write cycle is complete,  
the user has a choice of monitoring the Ready/Busy output or  
using Data polling. The Ready/Busy pin is an open drain output,  
which allows easy configuration in ‘wired-or’ systems. Alterna-  
tively, Data polling allows the user to read the location last written  
to when the write operation is complete. CMOS design and pro-  
cessing enables this part to be used in systems where reduced  
power consumption and reliability are required. A complete family  
of packages is offered to provide the utmost flexibility in applica-  
tions.  
A12  
2004 Microchip Technology Inc.  
Preliminary  
DS21113E-page 1  

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