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24LC65TI/SM

更新时间: 2024-10-31 23:19:15
品牌 Logo 应用领域
其他 - ETC 内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
12页 83K
描述
I2C Serial EEPROM

24LC65TI/SM 数据手册

 浏览型号24LC65TI/SM的Datasheet PDF文件第2页浏览型号24LC65TI/SM的Datasheet PDF文件第3页浏览型号24LC65TI/SM的Datasheet PDF文件第4页浏览型号24LC65TI/SM的Datasheet PDF文件第5页浏览型号24LC65TI/SM的Datasheet PDF文件第6页浏览型号24LC65TI/SM的Datasheet PDF文件第7页 
24LC65  
2
64K 2.5V I C Smart Serial EEPROM  
PACKAGE TYPES  
FEATURES  
• Voltage operating range: 2.5V to 6.0V  
- Peak write current 3 mA at 6.0V  
- Maximum read current 150 µA at 6.0V  
- Standby current 1 µA typical  
• Industry standard two wire bus protocol I C  
compatible  
• 8 byte page, or byte modes available  
• 2 ms typical write cycle time, byte or page  
• 64-byte input cache for fast write loads  
• Up to 8 devices may be connected to the same  
bus for up to 512K bits total memory  
• Including 100 kHz (2.5V) and 400 kHz (5.0V)  
compatibility  
• Programmable block security options  
• Programmable endurance options  
• Schmitt trigger, filtered inputs for noise suppres-  
sion  
PDIP  
A0  
A1  
1
2
8
7
VCC  
NC  
2
A2  
3
4
6
5
SCL  
SDA  
VSS  
SOIC  
1
8
A0  
A1  
VCC  
2
3
4
7
6
5
NC  
• Output slope control to eliminate ground bounce  
• Self-timed ERASE and WRITE cycles  
• Power on/off data protection circuitry  
• Endurance:  
A2  
SCL  
SDA  
VSS  
- 10,000,000 E/W cycles guaranteed for a High  
Endurance Block  
- 1,000,000 E/W cycles guaranteed for a Stan-  
dard Endurance Block  
BLOCK DIAGRAM  
• Electrostatic discharge protection > 4000V  
• Data retention > 200 years  
HV Generator  
A0..A2  
• 8-pin PDIP/SOIC packages  
Temperature ranges  
- Commercial (C):  
- Industrial (I)  
I/O  
Control  
Logic  
Memory  
Control  
Logic  
EEPROM ARRAY  
Page Latches  
0°C to +70°C  
-40°C to +85°C  
XDEC  
Cache  
YDEC  
DESCRIPTION  
I/O  
SCL  
The Microchip Technology Inc. 24LC65 is a “smart” 8K  
x 8 Serial Electrically Erasable PROM. This device  
has been developed for advanced, low power applica-  
tions such as personal communications, and provides  
the systems designer with flexibility through the use of  
many new user-programmable features. The 24LC65  
offers a relocatable 4K bit block of ultra-high-endurance  
memory for data that changes frequently. The remain-  
der of the array, or 60K bits, is rated at 1,000,000  
ERASE/WRITE (E/W) cycles guaranteed. The 24LC65  
features an input cache for fast write loads with a  
capacity of eight pages, or 64 bytes. This device also  
features programmable security options for E/W protec-  
tion of critical data and/or code of up to fifteen 4K  
SDA  
Vcc  
Vss  
Sense AMP  
R/W Control  
blocks. Functional address lines allow the connection of  
up to eight 24LC65's on the same bus for up to 512K  
bits contiguous EEPROM memory. Advanced CMOS  
technology makes this device ideal for low-power non-  
volatile code and data applications. The 24LC65 is  
available in the standard 8-pin plastic DIP and 8-pin  
surface mount SOIC package.  
I2C is a trademark of Philips Corporation.  
Smart Serial is a trademark of Microchip Technology Inc.  
1996 Microchip Technology Inc.  
DS21073E-page 1  
This document was created with FrameMaker 4 0 4  

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