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24AA64-/ST PDF预览

24AA64-/ST

更新时间: 2024-10-31 23:19:11
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 169K
描述
I2C Serial EEPROM

24AA64-/ST 数据手册

 浏览型号24AA64-/ST的Datasheet PDF文件第2页浏览型号24AA64-/ST的Datasheet PDF文件第3页浏览型号24AA64-/ST的Datasheet PDF文件第4页浏览型号24AA64-/ST的Datasheet PDF文件第5页浏览型号24AA64-/ST的Datasheet PDF文件第6页浏览型号24AA64-/ST的Datasheet PDF文件第7页 
24AA64/24LC64  
64K I2CCMOS Serial EEPROM  
DEVICE SELECTION TABLE  
PACKAGE TYPE  
8-LEAD PDIP  
Part  
Number  
Vcc  
Range  
Max Clock  
Frequency  
Temp  
Ranges  
A0  
1
8
Vcc  
24AA64  
1.8-5.5V  
400 kHz†  
C
A1  
A2  
2
3
7
6
WP  
24LC64  
100 kHz for Vcc < 2.5V.  
2.5-5.5V  
400 kHz  
I, E  
SCL  
Vss  
4
5
SDA  
FEATURES  
• Low power CMOS technology  
- Maximum write current 3 mA at 5.5V  
- Maximum read current 400 µA at 5.5V  
- Standby current 100 nA typical at 5.5V  
• 2-wire serial interface bus, I2C compatible  
• Cascadable for up to eight devices  
• Self-timed ERASE/WRITE cycle  
8-LEAD SOIC  
1
8
7
6
5
A0  
A1  
Vcc  
WP  
2
3
4
SCL  
SDA  
A2  
• 32-byte page or byte write modes available  
• 5 ms max write cycle time  
Vss  
• Hardware write protect for entire array  
• Output slope control to eliminate ground bounce  
• Schmitt trigger inputs for noise suppression  
• 1,000,000 erase/write cycles guaranteed  
• Electrostatic discharge protection > 4000V  
• Data retention > 200 years  
8-LEAD TSSOP  
8
7
6
5
1
WP  
Vcc  
A0  
SCL  
2
3
4
SDA  
Vss  
A2  
A1  
• 8-pin PDIP, SOIC (150 and 208 mil) and TSSOP  
packages  
Temperature ranges:  
- Commercial (C):  
- Industrial (I):  
BLOCK DIAGRAM  
0° to  
-40°C to +85°C  
-40°C to +125°C  
70°C  
A0 A1 A2 WP  
HV GENERATOR  
- Automotive (E)  
DESCRIPTION  
I/O  
CONTROL  
LOGIC  
MEMORY  
CONTROL  
LOGIC  
EEPROM  
ARRAY  
XDEC  
The Microchip Technology Inc. 24AA64/24LC64  
(24xx64*) is a 8K x 8 (64K bit) Serial Electrically Eras-  
able PROM capable of operation across a broad volt-  
age range (1.8V to 5.5V). It has been developed for  
advanced, low power applications such as personal  
communications or data acquisition. This device also  
has a page-write capability of up to 32 bytes of data.  
This device is capable of both random and sequential  
reads up to the 64K boundary. Functional address lines  
allow up to eight devices on the same bus, for up to 512  
Kbits address space. This device is available in the  
standard 8-pin plastic DIP, 8-pin SOIC (150 and  
208 mil), and 8-pin TSSOP.  
PAGE LATCHES  
I/O  
SCL  
YDEC  
SDA  
VCC  
VSS  
SENSE AMP  
R/W CONTROL  
I2C is a trademark of Philips Corporation.  
*24xx64 is used in this document as a generic part number for the 24AA64/24LC64 devices.  
2000 Microchip Technology Inc.  
DS21189D-page 1  
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