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24AA64_07 PDF预览

24AA64_07

更新时间: 2024-10-30 04:25:23
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
28页 418K
描述
64K I2C⑩ Serial EEPROM

24AA64_07 数据手册

 浏览型号24AA64_07的Datasheet PDF文件第2页浏览型号24AA64_07的Datasheet PDF文件第3页浏览型号24AA64_07的Datasheet PDF文件第4页浏览型号24AA64_07的Datasheet PDF文件第5页浏览型号24AA64_07的Datasheet PDF文件第6页浏览型号24AA64_07的Datasheet PDF文件第7页 
24AA64/24LC64/24FC64  
64K I2CSerial EEPROM  
Description:  
Device Selection Table  
Part  
Number  
VCC  
Range  
Max. Clock  
Frequency  
Temp.  
Ranges  
The Microchip Technology Inc. 24AA64/24LC64/  
24FC64 (24XX64*) is a 64 Kbit Electrically Erasable  
PROM. The device is organized as a single block of 8K  
x 8-bit memory with a 2-wire serial interface. Low-volt-  
age design permits operation down to 1.7V, with  
standby and active currents of only 1 μA and 1 mA,  
respectively. It has been developed for advanced, low-  
power applications such as personal communications  
or data acquisition. The 24XX64 also has a page write  
capability for up to 32 bytes of data. Functional address  
lines allow up to eight devices on the same bus, for up  
to 512 Kbits address space. The 24XX64 is available in  
the standard 8-pin PDIP, surface mount SOIC, TSSOP,  
DFN and MSOP packages.  
24AA64  
24LC64  
24FC64  
1.7-5.5  
2.5-5.5  
1.7-5.5  
400 kHz(1)  
400 kHz  
1 MHz(2)  
I
I, E  
I
Note 1: 100 kHz for VCC <2.5V  
2: 400 kHz for VCC <2.5V  
Features:  
• Single-supply with operation down to 1.7V for  
24AA64/24FC64 devices, 2.5V for 24LC64  
devices  
• Low-power CMOS technology:  
- Active current 1 mA, typical  
Package Types  
SOIC, TSSOP  
PDIP, MSOP  
- Standby current 1 μA, typical  
A0  
1
8
VCC  
• 2-wire serial interface, I2C™ compatible  
• Schmitt Trigger inputs for noise suppression  
• Output slope control to eliminate ground bounce  
• 100 kHz and 400 kHz clock compatibility  
• 1 MHz clock for FC versions  
1
2
3
4
8
7
6
5
A0  
A1  
VCC  
WP  
A1  
A2  
2
3
7
6
WP  
SCL  
A2  
SCL  
SDA  
VSS  
4
5
SDA  
VSS  
• Page write time 5 ms, typical  
DFN  
• Self-timed erase/write cycle  
1
VCC  
WP  
A0  
A1  
A2  
8
7
6
5
• 32-byte page write buffer  
2
3
4
• Hardware write-protect  
SCL  
SDA  
VSS  
• ESD protection > 4,000V  
• More than 1 million erase/write cycles  
• Data retention > 200 years  
Block Diagram  
• Factory programming available  
• Packages include 8-lead PDIP, SOIC, TSSOP,  
MSOP and DFN  
HV  
Generator  
WP  
• Pb-free and RoHS compliant  
Temperature ranges:  
I/O  
Control  
Logic  
Memory  
Control  
Logic  
EEPROM  
Array  
- Industrial (I): -40°C to +85°C  
- Automotive (E): -40°C to +125°C  
XDEC  
Page  
Latches  
I/O  
SCL  
YDEC  
SDA  
VCC  
VSS  
Sense Amp.  
R/W Control  
* 24XX64 is used in this document as a generic part  
number for the 24AA64/24LC64/24FC64 devices.  
© 2007 Microchip Technology Inc.  
DS21189L-page 1  

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