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ZL6105ALAF PDF预览

ZL6105ALAF

更新时间: 2024-11-24 01:11:55
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英特矽尔 - INTERSIL /
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35页 943K
描述
Digital DC/DC Controller with Drivers and Auto Compensation

ZL6105ALAF 数据手册

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Digital DC/DC Controller with Drivers and Auto  
Compensation  
ZL6105  
Features  
The ZL6105 is a digital power controller with integrated  
MOSFET drivers. Auto compensation eliminates the need for  
manual compensation design work. Adaptive performance  
optimization algorithms improve power conversion efficiency.  
Zilker Labs Digital-DC™ technology enables a blend of power  
conversion performance and power management features.  
Power Conversion  
• Efficient Synchronous Buck Controller  
• Auto Compensating PID Filter  
• Adaptive Light Load Efficiency Optimization  
• 3V to 14V Input Range  
The ZL6105 is designed to be a flexible building block for DC  
power and can be easily adapted to designs ranging from a  
single-phase power supply operating from a 3.3V to a  
multiphase current sharing supply operating from a 12V input.  
The ZL6105 eliminates the need for complicated power supply  
managers as well as numerous external discrete components.  
• 0.54V to 5.5V Output Range (with margin)  
• ±1% Output Voltage Accuracy  
• Internal 3A MOSFET Drivers  
• Fast Load Transient Response  
• Current Sharing and Phase Interleaving  
Snapshot™ Parameter Capture  
• Pb-Free (RoHs Compliant)  
The ZL6105 uses the I2C/SMBus™ with PMBus™ protocol for  
communication with a host controller and the Digital-DC bus  
for communication between Zilker Labs devices.  
The ZL6105 is pin for pin compatible with the ZL2008. The  
POLA VOUT table and compensation table have been removed.  
A new single resistor VOUT table and the Auto Compensation  
feature have been added.  
Power Management  
• Digital Soft-start/stop  
• Power-Good/Enable  
• Voltage Tracking, Sequencing and Margining  
• Voltage, Current and Temperature Monitoring  
• I2C/SMBus Interface, PMBus Compatible  
• Output Voltage and Current Protection  
• Internal Non-volatile Memory (NVM)  
Related Literature  
AN2032, “NLR Configuration for DDC Products”  
AN2033, “Zilker Labs PMBus Command Set - DDC Products”  
AN2034, “Configuring Current Sharing on the ZL2004 and  
ZL2006”  
Applications  
• Servers/Storage Equipment  
• Telecom/Datacom Equipment  
• Power Supply Modules  
AN2035, “Compensation Using CompZL™”  
100  
EN PG PH_EN FC ILIM CFG UVLO V25 VR VDD  
VOUT = 3.3V  
VOUT = 1.5V  
95  
90  
85  
80  
75  
70  
65  
60  
55  
V
SS  
VTRK  
MGN  
LDO  
POWER  
MANAGEMENT  
BST  
GH  
SYNC  
DDC  
DRIVER  
SW  
GL  
NON-  
VOLATILE  
MEMORY  
VSEN+  
VSEN-  
ISENA  
PWM  
CONTROLLER  
CURRENT  
SENSE  
ISENB  
SCL  
SDA  
SALRT  
VIN = 12V  
fSW = 400kHz  
Circuit of Figure 4  
TEMP  
SENSOR  
MONITOR  
ADC  
I2C  
3
50  
0
4
10  
14 16 18 20  
2
6
8
12  
SA  
XTEMP  
PGND SGND DGND  
Load Current (A)  
FIGURE 2. EFFICIENCY vs LOAD CURRENT  
FIGURE 1. BLOCK DIAGRAM  
December 19, 2013  
FN6906.5  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011-2013. All Rights Reserved  
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.  
All other trademarks mentioned are the property of their respective owners.  
1

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ZL6105ALAFT INTERSIL

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