ZL70100
Medical Implantable RF Transceiver
Data Sheet
May 2005
Features
•
402-405 MHz (10 MICS channels) and
433-434 MHz (2 ISM channels)
Ordering Information
ZL70100LDF1 - 48 pin QFN* (tape & reel,
bake and drypack)
ZL70100LDG1 -48 pin QFN* (tray, bake and
drypack)
•
•
High data rate (800/400/200 kbps raw data rate)
High performance MAC with automatic error
handling and flow control, typ < 1.5x10-10 BER.
*Pb Free Matte Tin
•
•
Very few external components
(2 pcs + antenna matching)
0°C to +55°C
Extremely low power consumption (5 mA,
continuous TX/RX, <1 mA low power mode)
Description
The ZL70100 is a high performance half duplex RF
communications link for medical implantable
applications. The system is very flexible and supports
several low power wakeup options. Extremely low
power is achievable using the 2.45 GHz ISM Band
Wakeup-receiver option. The high level of integration
•
•
Ultra low power wakeup circuit (200 nA)
Standards compatible (MICS, FCC, IEC)
Applications
•
•
Implantable Devices e.g., Pacemakers, ICD’s,
Cochlea implants, Neurostimulators, Implantable
Insulin Pumps, Bladder Control Devices,
implantable physiological monitors
includes
a
Media Access Controller, providing
complete control of the device along with coding and
decoding of RF messages. A standard SPI interface
provides for easy access by the application
Body area network, short range device
applications using the 433 MHz ISM band.
For further information please contact sales.
24 MHz
Zarlink MICS Transceiver - ZL70100
400MHzTransceiver
MediaAccessController
PLL
ADCanalogInputs
(TESTIO[4:1]pins)
4
ToADCMux
RS
Encoder
CRC
Generation
Mes s age
Storage
Whitening
PowerAmplifier
T X
Mi xer
tx_data
tx_clk
RF 400MHz
+
TXIFModulator
TX
400 MHz
TXControl
Programmable
IO
4
3
PO[3:0]
PI[2:0]
AnalogInputs
5bit
ADC
PeakDetector
4
Interface
SPI
SPI_CS_B
SPI_CLK
SPI_SDI
SPI_SDO
DataBus
Control
SPI
Interface
Antenna
Matching
RSSI
LowNoise
Amplifier
Mi xer
IRQ
RXControl
RX
RX
400 MHz
RF 400MHz
rx_data
Correlator
ADC
R X
RX IFFilterandFMDetector
CRC
Decode
Mes s age
Storage
RSDecode
Clock
Recovery
2
UltraLow
Power
Oscillator
TestModeControl
MODE[1:0]
PDCTRL
2.45 GHz Wake-Up Receiver
InputPinPull-downControl
RF2.45GHz
RX
2.45 GHz
Wake-Up
Control
Bypassofon-chipCrystalOscillatorControl
Regulator
1.85-2.0V
XO_BY PASS
R X
SelectIMDorBaseTransceiver
WakeupIMD
IBS
WU_EN
Antenna
Matc hi ng
Enable
2
Batteryor
OtherSupply
68nFDecoupling
Capacitor
Figure 1 - ZL70100 Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2005, Zarlink Semiconductor Inc. All Rights Reserved.