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ZL50053QCC PDF预览

ZL50053QCC

更新时间: 2024-02-18 20:55:04
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 开关电信集成电路
页数 文件大小 规格书
67页 558K
描述
8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs

ZL50053QCC 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QFP
包装说明:LFQFP, QFP256,1.2SQ,16针数:256
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.61JESD-30 代码:S-PQFP-G256
JESD-609代码:e0长度:28 mm
功能数量:1端子数量:256
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP256,1.2SQ,16封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):225
电源:1.8,3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Other Telecom ICs
标称供电电压:1.8 V表面贴装:YES
电信集成电路类型:DIGITAL TIME SWITCH温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.4 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:28 mm
Base Number Matches:1

ZL50053QCC 数据手册

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ZL50051/3  
Data Sheet  
Device Overview  
The ZL50051 and ZL50053 are two different packages of the same device. They have the same functionality  
except that ZL50053 does not have 16.384 MHz output clock and frame pulse (C16o and FP16o) due to package  
differences. The ZL50051/3 has two data ports, the Backplane and the Local port. The device can operate at two  
different data rates, 8.192 Mbps or 16.384 Mbps. All 64 input and 64 output streams must operate at the same data  
rate.  
The ZL50051/3 contains two data memory blocks (Backplane and Local) to provide the following switching path  
configurations:  
Input-to-Output Unidirectional, supporting 8 K x 8 K switching  
Backplane-to-Local Bi-directional, supporting 4 K x 4 K data switching  
Local-to-Backplane Bi-directional, supporting 4 K x 4 K data switching  
Backplane-to-Backplane Bi-directional, supporting 4 K x 4 K data switching  
Local-to-Local Bi-directional, supporting 4 K x 4 K data switching  
The device contains two connection memory blocks, one for the Backplane output and one for the Local output.  
Data to be output on the serial streams may come from either of the data memories (Connection Mode) or directly  
from the connection memory contents (Message Mode).  
In Connection Mode, the contents of the connection memory define, for each output stream and channel, the  
source stream and channel, (stored in data memory), to be switched.  
In Message Mode, microprocessor data can be written to the connection memory for broadcast on the output  
streams on a per channel basis. This feature is useful for transferring control and status information to external  
circuits or other ST-BUS devices.  
The device uses a master frame pulse (FP8i) and master clock (C8i) to define the input frame boundary and timing  
for both the Backplane port and the Local port. The device will automatically detect whether an ST-BUS or a GCI-  
Bus style frame pulse is being used. There is a two-frame delay from the time RESET is de-asserted to the  
establishment of full switch functionality. During this period, the input frame pulse format is determined before  
switching begins.  
The device provides FP8o, FP16o, C8o and C16o outputs to support external devices connected to the outputs of  
the Backplane and Local ports.  
A non-multiplexed Motorola microprocessor port allows programming of the various device operation modes and  
switching configurations. The microprocessor port provides access for Register read/write, Connection Memory  
read/write and Data Memory read-only operations. The port has a 15-bit address bus, 16-bit data bus and four  
control signals. The microprocessor may monitor channel data in the Backplane and Local data memories.  
The mandatory requirements of the IEEE-1149.1 (JTAG) standard are fully supported via a dedicated test port.  
The ZL50051 and ZL50053 are each available in one package:  
ZL50051: a 17 mm x 17 mm body, 1 mm ball-pitch, 256-PBGA  
ZL50053: a 28 mm x 28 mm body, 0.40 mm pin-pitch, 256-LQFP  
3
Zarlink Semiconductor Inc.  

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