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ZL40293LDF1 PDF预览

ZL40293LDF1

更新时间: 2024-11-09 18:58:51
品牌 Logo 应用领域
美国微芯 - MICROCHIP 驱动逻辑集成电路
页数 文件大小 规格书
29页 897K
描述
Low Skew Clock Driver, 4000/14000/40000 Series, 40 True Output(s), 0 Inverted Output(s), CMOS

ZL40293LDF1 技术参数

生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantFactory Lead Time:8 weeks
风险等级:5.75系列:4000/14000/40000
输入调节:DIFFERENTIALJESD-30 代码:S-XQCC-N72
长度:10 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:72实输出次数:40
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
传播延迟(tpd):1.5 nsSame Edge Skew-Max(tskwd):0.05 ns
座面最大高度:1 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:10 mm最小 fmax:250 MHz
Base Number Matches:1

ZL40293LDF1 数据手册

 浏览型号ZL40293LDF1的Datasheet PDF文件第2页浏览型号ZL40293LDF1的Datasheet PDF文件第3页浏览型号ZL40293LDF1的Datasheet PDF文件第4页浏览型号ZL40293LDF1的Datasheet PDF文件第5页浏览型号ZL40293LDF1的Datasheet PDF文件第6页浏览型号ZL40293LDF1的Datasheet PDF文件第7页 
Data Sheet  
ZL40293  
20-Output PCIe Gen 1, 2 ,3, 4 and 5 Buffer with Ultra-Low  
Additive Jitter  
Ordering Information  
Features  
ZL40293LDG1  
ZL40293LDF1  
72 pin QFN  
72 pin QFN  
Trays  
Tape and Reel  
Fully Compliant with PCIe 1, 2, 3, 4 and 5  
Specifications  
Package size: 10 x 10 mm  
20 Low-Power Push-Pull HCSL PCIe Outputs  
Ultra-low additive jitter: 10fs maximum  
Supports clock frequencies from 0 to 250MHz  
Supports 3.3V power supplies  
-40 C to +85 C  
Applications  
PCI Express generation 1/2/3/4/5 clock distribution  
Intel QPI  
Embedded Low Drop Out (LDO) Voltage regulator  
provides superior Power Supply Noise Rejection  
Servers  
Maximum output to output skew of 50ps  
SMBus Interface  
Storage and Data Centers  
Switches and Routers  
Eight OE pins  
Embedded series terminations adjusted for 100Ω  
differential transmission line  
Transparent for Spread-Spectrum Clock  
VDD  
VDD_A  
CLK_IN  
CK[19:0]  
CLK_IN#  
SA_0  
SA_1  
SDA  
Control  
Logic  
SCL  
PWRGD/PWRDN#  
OE#[12:5]  
RFU  
GND_A  
GND  
R_COMP  
Figure 1. Functional Block Diagram  
ZL40293  
March 2019  
© 2019 Microsemi Corporation  
1
 
 
 

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