Datasheet > ZL40272

ZL40272

更新时间： 2024-11-30 02:52:47

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
54页	2747K
描述
Low-Skew, Low Additive Jitter, 12 Output HCSL/LVDS/ LVPECL Fanout Buffer with Per-Output Enable Control

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ZL40272 数据手册

ZL40272

Low-Skew, Low Additive Jitter, 12 Output HCSL/LVDS/

LVPECL Fanout Buffer with Per-Output Enable Control

Features

• 3-to-1 input Multiplexer: Two Inputs Accept Any

Differential (LVPECL, HCSL, LVDS, SSTL, CML,

LVCMOS) or a Single-Ended Signal and the Third

Input Accepts a Crystal or a Single-Ended Signal

Applications

• PCIe Gen1/2/3/4/5 Clock Distribution

• Wired Communications: OTN, SONET/SDH, GE,

10 GE, FC, and 10G FC

• Twelve Differential HCSL/LVDS/LVPECL Outputs

• General Purpose Clock Distribution

• Low Jitter Clock Trees

• Ultra-Low Additive Jitter: 24 fs (Integration Band:

12 kHz to 20 MHz at 625 MHz Clock Frequency)

• Logic Translation

• Supports Clock Frequencies from 0 GHz to

1.5 GHz

• Clock and Data Signal Restoration

• Wireless Communications

• Supports 2.5V or 3.3V Power Supplies on HCSL/

LVDS/LVPECL Outputs

• High Performance Microprocessor Clock Distribu-

tion

• Embedded Low Drop Out (LDO) Voltage Regula-

tor Provides Superior Power Supply Noise Rejec-

tion

• Test Equipment

• Maximum Output to Output Skew of 50 ps

• Device Controlled via I²C or Hardware Control

Pins

• Factory Configurable Default Settings via OTP

• Transparent for Spread Spectrum Clock

SEL

OUT0_p

HW_CTRL/SMBus

IN_SEL0

I2C_SA_0

OUT0_n

IN_SEL0/

I2C_SA_0

IN_SEL1/

I2C_SA_1

Registers:

xtal_buf_gain[7:0]

xtal_drive_level[7:0]

xtal_load_cap[7:0]

xtal_normal_run

input_select[1:0]

output_drive_low[7:0]

output_drive_low[11:8]

vcm_sel

OUT1_p

OUT1_n

IN_SEL1

I2C_SA_0

OUT2_p

OUT2_n

OUT_TYPE_SEL0

I2C_SCL

dev_addr[2:0]

Device ID

OUT_TYPE_SEL0/

I2C_SCL

OUT3_p

OUT3_n

OUT_TYPE_SEL1

I2C_SDA

OUT_TYPE_SEL1

/I2C_SDA

OUT4_p

OUT4_n

OE_b[11:0]

OUT5_p

OUT5_n

IN0_p

IN0_n

OUT6_p

OUT6_n

IN1_p

IN1_n

OUT7_p

OUT7_n

XOUT

OUT8_p

OUT8_n

XIN

ZL40272

OUT9_p

OUT9_n

IREF

OUT10_p

OUT10_n

R_H

OUT11_p

OUT11_n

FIGURE 0-1:

Functional Block Diagram.

 2020 - 2021 Microchip Technology Inc. and its subsidiaries

DS20006408B-page 1

12 3 4 5 6 7...54

中文翻译

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与ZL40272相关器件

型号	品牌	获取价格	描述	数据表
ZL40272LDF1	MICROCHIP	获取价格	Low-Skew, Low Additive Jitter, 12 Output HCSL/LVDS/ LVPECL Fanout Buffer with Per-Output E
ZL40272LDG1	MICROCHIP	获取价格	Low-Skew, Low Additive Jitter, 12 Output HCSL/LVDS/ LVPECL Fanout Buffer with Per-Output E
ZL40292	MICROCHIP	获取价格	The ZL40292 is part of a family of high-performance, ultra-low jitter, low power 1 to 20 H
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ZL40293LDF1	MICROCHIP	获取价格	Low Skew Clock Driver, 4000/14000/40000 Series, 40 True Output(s), 0 Inverted Output(s), C
ZL40294	MICROCHIP	获取价格	The ZL40294 is part of a family of high-performance, ultra-low jitter, low power 1 to 20 H
ZL40295	MICROCHIP	获取价格	The ZL40295 is part of a family of high-performance, ultra-low jitter, low power 1 to 20 H
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