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XR17L152IM PDF预览

XR17L152IM

更新时间： 2024-11-22 22:34:39
品牌 Logo 应用领域
艾科嘉 - EXAR PC
页数 文件大小 规格书
55页 320K
描述
3.3V PCI BUS DUAL UART

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中文翻译

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XR17L152IM 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：TFQFP,针数：100
Reach Compliance Code：unknownHTS代码：8542.31.00.01
风险等级：5.84地址总线宽度：32
边界扫描：NO总线兼容性：PCI
最大时钟频率：33 MHz通信协议：ASYNC, BIT
数据编码/解码方法：NRZ最大数据传输速率：0.390625 MBps
外部数据总线宽度：32JESD-30 代码：S-PQFP-G100
长度：14 mm低功率模式：YES
串行 I/O 数：2端子数量：100
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TFQFP
封装形状：SQUARE封装形式：FLATPACK, THIN PROFILE, FINE PITCH
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压：3.63 V最小供电电压：2.97 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD宽度：14 mm
uPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches：1

XR17L152IM 数据手册

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áç  
DISCONTINUED  
XR17L152  
3.3V PCI BUS DUAL UART  
AUGUST 2003  
REV. 1.1.0  
FEATURES  
GENERAL DESCRIPTION  
The XR17L1521 (L152) is a monolithic dual PCI Bus  
Universal Asynchronous Receiver and Transmitter (UART)  
in Exar’s PCI Bus UART family. The device is designed to  
meet today’s 32-bit PCI Bus and high bandwidth  
requirements in communication systems. The global  
interrupt source register provides a complete interrupt  
status indication for both channels to speed up interrupt  
parsing. Each UART is independently controlled and has its  
own 16C550 compatible 5G (Fifth Generation) register set,  
transmit and receive FIFOs of 64 bytes, fully programmable  
transmit and receive FIFO trigger levels, transmit and  
receive FIFO level counters, automatic hardware flow  
control with programmable hysteresis, automatic software  
(Xon/Xoff) flow control, automatic half-duplex control  
output, wireless IrDA (Infrared Data Association) infrared  
encoder/decoder, 8 multi-purpose definable inputs/outputs,  
and a 16-bit general purpose timer/counter.  
• High Performance DUART  
• PCI Bus 2.2 Target Interface Compliance  
• 3.3 V PCI Bus Compliant up to 33 MHz Clock  
• 5 Volt Tolerant Serial Inputs  
• 32-bit PCI Bus Interface with EEPROM Interface  
• A Global Interrupt Source Register for both UARTs  
• Data Transfer in Byte, Word and Double-word  
• Data Read/Write Burst Operation  
• Each UART is independently controlled with:  
•16C550 Compatible 5G Register Set  
•64-byte Transmit and Receive FIFOs  
•Transmit and Receive FIFO Level Counters  
•Programmable TX and RX FIFO Trigger Level  
•Automatic RTS/CTS or DTR/DSR Flow Control  
•Automatic Xon/Xoff Software Flow Control  
NOTE: 1 Covered by U.S. Patents #5,649,122, #5,949,787  
APPLICATIONS  
• Network Management  
•Automatic RS485 Half-duplex Control Output with  
Selectable Turn-around Delay (0 to 15 bit-times)  
• Factory Automation and Process Control  
• Ethernet Network to Serial Ports  
• Point-of-Sale Systems  
•Infrared (IrDA 1.0) Data Encoder/Decoder  
•Programmable Data Rate with Prescaler  
•Up to 3.125 Mbps Data Rate at 8X Sampling  
• Eight Multi-Purpose Inputs/outputs  
• Multi serial ports RS-232/RS-422/RS-485 Cards  
• A General Purpose 16-bit Timer/Counter  
• Sleep Mode with Automatic Wake-up Indicator  
• Same package and pin-out as XR17C152 and  
XR17D152 (14x14x1.0 mm TQFP)  
FIGURE 1. BLOCK DIAGRAM  
3.3V VCC  
GND  
*5V Tolerance for non-PCI Inputs  
UART Channel 0  
CLK  
RST#  
AD[31:0]  
C/BE[3:0]#  
FRAME#  
IRDY#  
64 Byte TX FIFO  
UART  
TX0, RX0, DTR0#,  
DSR0#, RTS0#,  
CTS0#, CD0#, RI0#  
Regs  
IR  
ENDEC  
TX  
& RX  
PCI Local  
Bus  
Interface  
TRDY#  
BRG  
64 Byte RX FIFO  
Device  
Configuration  
Registers  
DEVSEL#  
STOP#  
INTA#  
UART Channel 1  
TX1, RX1, DTR1#,  
IDSEL  
PERR#  
SERR#  
PAR  
64 Byte TX FIFO  
UART  
Regs  
DSR1#, RTS1#,  
CTS1#, CD1#, RI1#  
IR  
ENDEC  
TX  
& RX  
BRG  
64 Byte RX FIFO  
Configuration  
Space  
Registers  
16-bit  
Timer/Counter  
Multi-purpose  
EECK  
EEDI  
MPIO0- MPIO7  
EEPROM  
Interface  
Inputs/Outputs  
EEDO  
EECS  
XTAL1  
XTAL2  
Crystal Osc/Buffer  
ENIR  
EN485#  
TMRCK  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com  
1234567...55

中文翻译

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