Datasheet > XR17V354

XR17V354

更新时间： 2024-11-26 07:07:23

品牌	Logo	应用领域
艾科嘉 - EXAR		PC
页数	文件大小	规格书
66页	1602K
描述
HIGH PERFORMANCE QUAD PCI-EXPRESS UART

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中文翻译

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数据手册

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XR17V354 数据手册

PRELIMINARY

XR17V354

HIGH PERFORMANCE QUAD PCI-EXPRESS UART

JULY 2009

REV. P1.0.2

FEATURES

GENERAL DESCRIPTION

• Single 3.3V power supply

The XR17V354 (V354) is a single chip 4-channel

PCI Express (PCIe) UART (Universal Asynchronous

Receiver and Transmitter), optimized for higher

performance and lower power. The V354 serves as a

single lane PCIe bridge to 4 indepedent enhanced

16550 compatible UARTs. The V354 is compliant to

PCIe 2.0 Gen 1 (2.5GT/s).

• Internal buck regulator for 1.2V core

• PCIe 2.0 Gen 1 compliant

• x1 Link, dual simplex, 2.5Gbps in each direction

• Expansion bus interface

• EEPROM interface for configuration

• Data read/write burst operation

• Global interrupt status register for all four UARTs

• Up to 25 Mbps serial data rate

In addition to the UART channels, the V354 has 16

multi-purpose I/Os (MPIOs), a 16-bit general purpose

counter/timer and a global interrupt status register to

optimize interrupt servicing.

Each UART of the V354 has many enhanced

features such as the 256-bytes TX and RX FIFOs,

programmable Fractional Baud Rate Generator,

Automatic Hardware or Software Flow Control, Auto

RS-485 Half-Duplex Direction Control, programmable

TX and RX FIFO Trigger Levels, TX and RX FIFO

Level Counters, infrared mode, and data rates up to

25Mbps. The V354 is available in a 176-pin FPBGA

package (13 x 13 mm).

• 16 multi-purpose inputs/outputs (MPIOs)

• 16-bit general purpose timer/counter

• Sleep mode with wake-up Indicator

• Four independent UART channels controlled with

■ 16550 compatible register Set

■ 256-byte TX and RX FIFOs

■ Programmable TX and RX Trigger Levels

■ TX/RX FIFO Level Counters

NOTE 1: Covered by U.S. Patents #5,649,122, #6,754,839,

#6,865,626 and #6,947,999

APPLICATIONS

■ Fractional baud rate generator

■ Automatic RTS/CTS or DTR/DSR hardware

flow control with programmable hysteresis

■ Automatic Xon/Xoff software flow control

■ RS-485 half duplex direction control output

with programmable turn-around delay

• Next generation Point-of-Sale Systems

• Remote Access Servers

• Storage Network Management

• Factory Automation and Process Control

• Multi-port RS-232/RS-422/RS-485 Cards

■ Multi-drop with Auto Address Detection

■ Infrared (IrDA 1.1) data encoder/decoder

• Software compatible to XR17C15x, XR17D15x,

XR17V25x PCI UARTs

FIGURE 1. BLOCK DIAGRAM OF THE XR17V354

C o n fig u ratio n

S p a ce

R eg isters

T X +

T X -

R X +

R X -

C L K +

C L K -

T X [3:0 ]

T X [7:0 ]

U A R T C h a n n e l

B u c k R e g u la to r

26546- -b y te T X F IF O

R X [3:0 ]

R X [7 :0 ]

R T S # [3:0 ]

U A R T

R e g s

TTXX && RRXX

E N D E C

2 5 6 -b yte R X F IF O

B R G 64- b yte R X F IF O

1 2 5 M H z C lo c k

D T R #[3 :0 ]

C T S #[3 :0]

P C Ie

C L K R E Q #

P E R S T #

P C I L o c a l

In te rfa c e

U A R T C h a n n e l

B u s

In te rfa c e

D S R #[3 :0]

D C D # [3:0 ]

R I#[3 :0]

E N 4 8 5 #

E N IR #

U A R T C h a n n e l

G lo b a l

C o n fig u ra tio n

R e g is te rs

E E C K

E E D I

C o n fig u ratio n

S p a ce

U A R T C h a n n e l

E E P R O M

R eg isters

In te rfa c e

E E D O

E E C S

U A R T C h a n n e l

M u lti-p u rp o s e

M P IO [15 :0]

D [7 :0 ]

In p u ts/O u tp u ts

U A R T C h a n n e l

S E L

C L K

p u rp o s e

1 6- b it

T im e r/C o u n ter

E x p a n s io n

In te rfac e

In p u ts /O u tp u ts

IN T

C ry s ta l O sc /B u ffe r

M O D E

P R E S

T M R C K

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com

12 3 4 5 6 7...66

中文翻译

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