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XR16M890IL40 PDF预览

XR16M890IL40

更新时间: 2024-11-22 07:56:19
品牌 Logo 应用领域
艾科嘉 - EXAR 转换器电平转换器先进先出芯片
页数 文件大小 规格书
63页 1427K
描述
UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS

XR16M890IL40 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:6 X 6 MM, 0.90 MM HEIGHT, QFN-40针数:40
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.75其他特性:IT ALSO OPERATES AT 3.63V I/O SUPPLY
地址总线宽度:3边界扫描:NO
最大时钟频率:96 MHz通信协议:ASYNC, BIT
数据编码/解码方法:NRZ外部数据总线宽度:8
JESD-30 代码:S-XQCC-N40长度:6 mm
低功率模式:YES串行 I/O 数:1
端子数量:40最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:1 mm
最大供电电压:3.63 V最小供电电压:2.97 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:6 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

XR16M890IL40 数据手册

 浏览型号XR16M890IL40的Datasheet PDF文件第2页浏览型号XR16M890IL40的Datasheet PDF文件第3页浏览型号XR16M890IL40的Datasheet PDF文件第4页浏览型号XR16M890IL40的Datasheet PDF文件第5页浏览型号XR16M890IL40的Datasheet PDF文件第6页浏览型号XR16M890IL40的Datasheet PDF文件第7页 
XR16M890  
UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS  
APRIL 2011  
REV. 1.0.0  
FEATURES  
GENERAL DESCRIPTION  
Integrated Level Shifters on CPU interface, UART  
1
The XR16M890  
(M890) is  
a
single-channel  
and GPIO signals  
Universal Asynchronous Receiver and Transmitter  
(UART) with integrated level shifters and 128 bytes of  
transmit and receive FIFOs.  
Intel/Motorola/VLIO Bus Interface select  
’0’ ns address setup/hold times  
24 Mbps maximum UART data rate  
Up to 16 GPIOs  
For flexibility in a mixed voltage environment, the  
M890 has 4 VCC pins. There is a VCC pin for the  
core, a VCC pin for the UART signals, a VCC pin for  
the CPU interface signals and a VCC pin for the  
GPIO signals. The VCC pins for the UART, GPIO  
and CPU interface signals allow for the M890 to  
interface with devices operating at different voltage  
levels eliminating the need for external voltage level  
shifters.  
128-Bytes TX and RX FIFOs  
Programmable TX/RX trigger levels  
TX/RX FIFO Level Counters  
Independent TX/RX Baud Rate Generator  
Fractional Baud Rate Generator  
Auto RTS/CTS Hardware Flow Control  
Auto XON/XOFF Software Flow Control  
Auto RS-485 Half-Duplex Direction Control  
Multidrop mode w/ Auto Address Detect (RX)  
Multidrop mode w/ Address Byte Control (TX)  
Sleep Mode with Automatic Wake-up  
Infrared (IrDA 1.0 and 1.1) mode  
1.62V to 3.63V supply operation  
5V tolerant inputs  
The Auto RS-485 Half-Duplex Direction control  
feature simplifies both the hardware and software for  
half-duplex RS-485 applications. In addition, the  
Multidrop mode with Auto Address detection and  
Address Byte Control features increase the  
performance by simplifying the software routines.  
The Independent TX/RX Baud Rate Generator  
feature allows the transmitter and receiver to operate  
at different baud rates. In addition, the Fractional  
Baud Rate Generator feature provides flexibility for  
crystal/clock frequencies for generating standard and  
non-standard baud rates.  
The M890 has programmable transmit and receive  
FIFO trigger levels, automatic hardware and software  
flow control, and data rates of up to 24 Mbps. Power  
consumption of the M890 can be minimized by  
enabling the sleep mode.  
Crystal oscillator or external clock input  
APPLICATIONS  
Personal Digital Assistants (PDA)  
Cellular Phones/Data Devices  
Battery-Operated Devices  
Global Positioning System (GPS)  
Bluetooth  
The M890 has a 16550 compatible register set that  
provide users with operating status and control,  
receiver error indications, and modem serial interface  
controls. An internal loopback capability allows  
onboard diagnostics. The M890 has a selectable  
Intel/Motorola/VLIO bus interface.  
NOTE: 1 Covered by U.S. Patent #5,649,122.  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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