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XR16M890IM48-F PDF预览

XR16M890IM48-F

更新时间: 2024-11-22 12:20:23
品牌 Logo 应用领域
艾科嘉 - EXAR /
页数 文件大小 规格书
2页 755K
描述
Single-Channel UARTs with Selectable Bus Interfaces

XR16M890IM48-F 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TFQFP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.76
最长访问时间:45 ns其他特性:PARITY GENERATOR
JESD-30 代码:S-PQFP-G48JESD-609代码:e3
长度:7 mm内存密度:1024 bit
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:48
字数:128 words字数代码:128
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:128X8
可输出:NO封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):260座面最大高度:1.2 mm
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):1.62 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:7 mm
Base Number Matches:1

XR16M890IM48-F 数据手册

 浏览型号XR16M890IM48-F的Datasheet PDF文件第2页 
8-bit (Intel/Motorola/VLIO) UART with 128-Byte FIFO and Integrated Level Shifters  
XR16M890  
Single-Channel UARTs with Selectable Bus Interfaces  
Simplify Mixed Voltage Designs for Next Generation Systems  
The XR16M8901 (M890) is a single-channel Universal Asynchronous Receiver  
and Transmitter (UART) with integrated level shifters and 128 bytes of transmit  
FEATURES  
Integrated Level Shifters on  
CPU interface, UART and  
GPIO signals  
and receive FIFOs.  
For flexibility in a mixed voltage environment, the M890 has 4 VCC pins. There  
is a VCC pin for the core, a VCC pin for the UART signals, a VCC pin for the  
CPU interface signals and a VCC pin for the GPIO signals. The VCC pins for the  
UART, GPIO and CPU interface signals allow for the M890 to interface with  
devices operating at different voltage levels eliminating the need for external  
voltage level shifters. The VCC core voltage helps to lower the overall power  
consumption for applications that use slower data rates.  
Intel/Motorola/VLIO Bus  
Interface select  
24 Mbps maximum UART data  
rate  
Up to 16 GPIOs  
128-Bytes TX and RX FIFOs  
Programmable TX/RX trigger  
levels  
The Auto RS-485 Half-Duplex Direction control feature simplifies both the  
hardware and software for half-duplex RS-485 applications. In addition, the  
Multidrop mode with Auto Address detection and Address Byte Control features  
increase the performance by simplifying the software routines.  
TX/RX FIFO Level Counters  
Independent TX/RX Baud Rate  
Generator  
Fractional Baud Rate Generator  
The Independent TX/RX Baud Rate Generator feature allows the transmitter  
and receiver to operate at different baud rates. In addition, the Fractional Baud  
Rate Generator feature provides flexibility for crystal/clock frequencies for  
generating standard and non-standard baud rates.  
Auto RTS/CTS Hardware Flow  
Control  
Auto XON/XOFF Software Flow  
Control  
The M890 has programmable transmit and receive FIFO trigger levels, automatic  
hardware and software flow control, and data rates of up to 24 Mbps. Power  
consumption of the M890 can be minimized by enabling the sleep mode.  
Auto RS-485 Half-Duplex  
Direction Control  
Multidrop mode w/ Auto  
Address Detect (RX)  
The M890 has a 16550 compatible register set that provide users with operating  
status and control, receiver error indications, and modem serial interface  
controls. An internal loopback capability allows onboard diagnostics. The M890  
has a selectable Intel/Motorola/VLIO bus interface.  
Multidrop mode w/ Address  
Byte Control (TX)  
Sleep Mode with Automatic  
Wake-up  
Infrared (IrDA 1.0 and 1.1)  
mode  
1.62V to 3.63V supply operation  
Crystal oscillator or external  
clock input  
5V tolerant inputs  
www.exar.com  

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