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XR16L2750CJ PDF预览

XR16L2750CJ

更新时间: 2024-11-06 22:41:15
品牌 Logo 应用领域
艾科嘉 - EXAR 微控制器和处理器串行IO控制器通信控制器外围集成电路先进先出芯片数据传输时钟
页数 文件大小 规格书
49页 568K
描述
2.25V TO 5.5V DUART WITH 64-BYTE FIFO

XR16L2750CJ 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:LCC包装说明:PLASTIC, LCC-44
针数:44Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.8
Is Samacsys:N其他特性:ALSO OPERATES AT 2.5V SUPPLY
地址总线宽度:3边界扫描:NO
最大时钟频率:50 MHz通信协议:ASYNC, BIT
数据编码/解码方法:NRZ最大数据传输速率:0.78125 MBps
外部数据总线宽度:8JESD-30 代码:S-PQCC-J44
JESD-609代码:e0长度:16.585 mm
低功率模式:YES串行 I/O 数:2
端子数量:44最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):240电源:2.5/5 V
认证状态:Not Qualified座面最大高度:4.572 mm
子类别:Serial IO/Communication Controllers最大供电电压:5.5 V
最小供电电压:2.25 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:16.585 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

XR16L2750CJ 数据手册

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áç  
XR16L2750  
2.25V TO 5.5V DUART WITH 64-BYTE FIFO  
SEPTEMBER 2002  
REV.1.0.0  
FEATURES  
GENERAL DESCRIPTION  
The XR16L27501 (2750) is a low voltage dual  
universal asynchronous receiver and transmitter  
(UART) with 5 Volt tolerant inputs. The device  
operates from 2.25 to 5.5 Volt supply range and is  
pin-to-pin compatible to Exar’s ST16C2550 and  
XR16C2850 except the 48-TQFP package. The 2750  
register set is compatible to the ST16C2550 and the  
XR16C2850 enhanced features. It supports the  
Exar’s enhanced features of 64 bytes of TX and RX  
FIFOs, programmable FIFO trigger level and FIFO  
level counters, automatic hardware (RTS/CTS) and  
software flow control, automatic RS-485 half duplex  
direction control output and a complete modem  
interface. Onboard registers provide the user with  
operational status and data error flags. An internal  
loopback capability allows system diagnostics.  
Independent programmable baud rate generators are  
provided in each channel to select data rates up to  
6.25 Mbps at 5 Volt and 8X sampling clock. The 2750  
is available in 48-pin TQFP and 44-pin PLCC  
packages.  
2.25 to 5.5 Volt Operation  
5 Volt Tolerant Inputs  
Pin-to-pin compatible to Exar’s ST16C2550 and  
TI’s TL16C752B on the 48-TQFP package  
Pin alike XR16C2850 48-TQFP package but  
without CLK8/16, CLKSEL and HDCNTL inputs  
Two independent UART channels  
Reg set compatible to 16C2550 and 16C2850  
Up to 6.25 Mbps at 5 Volt, 4 Mbps at 3.3 Volt,  
and 3 Mbps at 2.5 Volt with 8X sampling rate  
Transmit and Receive FIFOs of 64 bytes  
Programmable TX and RX FIFO Trigger Levels  
Transmit and Receive FIFO Level Counters  
Automatic Hardware (RTS/CTS) Flow Control  
Selectable Auto RTS Flow Control Hysteresis  
Automatic Software (Xon/Xoff) Flow Control  
Automatic RS-485 Half-duplex Direction  
Control Output via RTS#  
Wireless Infrared (IrDA 1.0) Encoder/Decoder  
Automatic sleep mode  
NOTE: 1 Covered by U.S. Patent #5,649,122 and #5,832,205  
APPLICATIONS  
Full modem interface  
Portable Appliances  
Device Identification and Revision  
Telecommunication Network Routers  
Ethernet Network Routers  
Crystal oscillator or external clock input  
Industrial and commercial temperature ranges  
48-TQFP and 44-PLCC packages  
Cellular Data Devices  
Factory Automation and Process Controls  
FIGURE 1. XR16L2750 BLOCK DIAGRAM  
2.25 to 5.5 Volt VCC  
GND  
* 5 Volt Tolerant Inputs  
A2:A0  
D7:D0  
IOR#  
IOW#  
UART Channel A  
64 Byte TX FIFO  
TXA, RXA, DTRA#,  
DSRA#, RTSA#,  
DTSA#, CDA#, RIA#,  
OP2A#  
CSA#  
CSB#  
UART  
Regs  
IR  
TX & RX  
ENDEC  
8-bit Data  
Bus  
INTA  
INTB  
BRG  
Interface  
TXRDYA#  
TXRDYB#  
RXRDYA#  
RXRDYB#  
TXB, RXB, DTRB#,  
DSRB#, RTSB#,  
CTSB#, CDB#, RIB#,  
OP2B#  
UART Channel B  
(same as Channel A)  
Reset  
XTAL1  
XTAL2  
Crystal Osc/Buffer  
2750BLK  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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