XMC7000 microcontroller
32-bit Arm® Cortex®-M7
Table of contents
Table of contents
General description ...........................................................................................................................1
Features ...........................................................................................................................................1
Table of contents...............................................................................................................................5
Features list..................................................................................................................................... 6
Communication peripheral instance list.................................................................................................................... 8
Blocks and functionality ................................................................................................................... 9
Architecture block diagram......................................................................................................................................... 9
Functional description.................................................................................................................... 10
CPU subsystem .......................................................................................................................................................... 10
System resources....................................................................................................................................................... 11
Peripherals................................................................................................................................................................. 15
I/Os ............................................................................................................................................................................. 18
XMC7100 address map .................................................................................................................... 21
Flash base address map .................................................................................................................. 23
Peripheral I/O map ......................................................................................................................... 25
XMC7100 clock diagram .................................................................................................................. 27
XMC7100 CPU start-up sequence ..................................................................................................... 28
Pin assignment .............................................................................................................................. 29
High-speed I/O matrix connections .................................................................................................. 36
Package pin list and alternate functions........................................................................................... 37
Power pin assignments................................................................................................................... 45
Alternate function pin assignments ................................................................................................. 46
Pin function description............................................................................................................................................ 54
Interrupts and wake-up assignments............................................................................................... 57
Core interrupt types ....................................................................................................................... 67
Trigger multiplexer ........................................................................................................................ 68
Triggers group inputs ..................................................................................................................... 70
Triggers group outputs ................................................................................................................... 74
Triggers one-to-one........................................................................................................................ 75
Peripheral clocks............................................................................................................................ 79
Faults............................................................................................................................................ 82
Peripheral protection unit fixed structure pairs................................................................................ 85
Bus masters ................................................................................................................................... 98
Miscellaneous configuration ........................................................................................................... 99
Development support................................................................................................................... 101
Documentation........................................................................................................................................................ 101
Tools......................................................................................................................................................................... 101
Electrical specifications ................................................................................................................ 102
Absolute maximum ratings ..................................................................................................................................... 102
Device-level specifications...................................................................................................................................... 108
Smoothing capacitor recommendations ............................................................................................................... 109
DC specifications ..................................................................................................................................................... 110
Reset specifications................................................................................................................................................. 115
I/O ............................................................................................................................................................................. 116
Analog peripherals................................................................................................................................................... 122
26.8 AC specifications...............................................................................................................................................128
Digital peripherals ................................................................................................................................................... 129
Memory .................................................................................................................................................................... 139
System resources..................................................................................................................................................... 141
Clock specifications................................................................................................................................................. 154
Clock timing diagrams........................................................................................................................................... 160
Datasheet
5
002-33896 Rev. *A
2022-10-20