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XCF16PFG48

更新时间: 2024-11-07 03:14:43
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赛灵思 - XILINX 可编程只读存储器
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描述
Platform Flash In-System Programmable Configuration PROMS

XCF16PFG48 数据手册

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<BL Blue>  
Platform Flash In-System  
Programmable Configuration  
PROMS  
R
0
DS123 (v2.9) May 09, 2006  
Product Specification  
Features  
In-System Programmable PROMs for Configuration of  
Xilinx FPGAs  
XCF01S/XCF02S/XCF04S  
3.3V supply voltage  
Low-Power Advanced CMOS NOR FLASH Process  
Endurance of 20,000 Program/Erase Cycles  
Serial FPGA configuration interface (up to 33 MHz)  
Available in small-footprint VO20 and VOG20  
packages.  
Operation over Full Industrial Temperature Range  
(–40°C to +85°C)  
XCF08P/XCF16P/XCF32P  
IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)  
Support for Programming, Prototyping, and Testing  
1.8V supply voltage  
Serial or parallel FPGA configuration interface  
(up to 33 MHz)  
JTAG Command Initiation of Standard FPGA  
Configuration  
Available in small-footprint VO48, VOG48, FS48,  
and FSG48 packages  
Cascadable for Storing Longer or Multiple Bitstreams  
Dedicated Boundary-Scan (JTAG) I/O Power Supply  
Design revision technology enables storing and  
accessing multiple design revisions for  
configuration  
(V  
)
CCJ  
I/O Pins Compatible with Voltage Levels Ranging From  
1.5V to 3.3V  
Built-in data decompressor compatible with Xilinx  
advanced compression technology  
Design Support Using the Xilinx Alliance ISE and  
Foundation ISE Series Software Packages  
Table 1: Platform Flash PROM Features  
Program  
In-system  
via JTAG  
Serial  
Parallel  
Design  
Density  
VCCINT VCCO Range VCCJ Range  
Packages  
Compression  
Device  
Config. Config. Revisioning  
XCF01S  
XCF02S  
XCF04S  
1 Mbit  
2 Mbit  
4 Mbit  
3.3V 1.8V – 3.3V 2.5V – 3.3V VO20/VOG20  
3.3V 1.8V – 3.3V 2.5V – 3.3V VO20/VOG20  
3.3V 1.8V – 3.3V 2.5V – 3.3V VO20/VOG20  
VO48/VOG48  
1.8V 1.5V – 3.3V 2.5V – 3.3V  
FS48/FSG48  
XCF08P  
8 Mbit  
VO48/VOG48  
1.8V 1.5V – 3.3V 2.5V – 3.3V  
FS48/FSG48  
XCF16P 16 Mbit  
XCF32P 32 Mbit  
VO48/VOG48  
1.8V 1.5V – 3.3V 2.5V – 3.3V  
FS48/FSG48  
Description  
Xilinx introduces the Platform Flash series of in-system  
programmable configuration PROMs. Available in 1 to 32  
Megabit (Mbit) densities, these PROMs provide an  
easy-to-use, cost-effective, and reprogrammable method  
for storing large Xilinx FPGA configuration bitstreams. The  
Platform Flash PROM series includes both the 3.3V  
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS  
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that  
support Master Serial and Slave Serial FPGA configuration  
modes (Figure 1, page 2). The XCFxxP version includes  
32-Mbit, 16-Mbit, and 8-Mbit PROMs that support Master  
Serial, Slave Serial, Master SelectMAP, and Slave  
SelectMAP FPGA configuration modes (Figure 2, page 2).  
A summary of the Platform Flash PROM family members  
and supported features is shown in Table 1.  
© 2003-2006 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
PowerPC is a trademark of IBM, Inc. All other trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS123 (v2.9) May 09, 2006  
www.xilinx.com  
1

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