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XCF16PFS48C PDF预览

XCF16PFS48C

更新时间: 2024-11-07 03:14:43
品牌 Logo 应用领域
赛灵思 - XILINX 可编程只读存储器
页数 文件大小 规格书
46页 579K
描述
Platform Flash In-System Programmable Configuration PROMS

XCF16PFS48C 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:BGA
包装说明:PLASTIC, TFBGA-48针数:48
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:2.27
其他特性:IT CAN ALSO OPERATES AT 2.5, 3.3 VOLT NOMINAL数据保留时间-最小值:20
耐久性:20000 Write/Erase CyclesJESD-30 代码:R-PBGA-B48
JESD-609代码:e0长度:9 mm
内存密度:16777216 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1湿度敏感等级:3
功能数量:1端子数量:48
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:16MX1
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.5/3.3,1.8 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Flash Memories最大压摆率:0.04 mA
最大供电电压 (Vsup):2 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn63Pb37)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED类型:NOR TYPE
宽度:8 mmBase Number Matches:1

XCF16PFS48C 数据手册

 浏览型号XCF16PFS48C的Datasheet PDF文件第2页浏览型号XCF16PFS48C的Datasheet PDF文件第3页浏览型号XCF16PFS48C的Datasheet PDF文件第4页浏览型号XCF16PFS48C的Datasheet PDF文件第5页浏览型号XCF16PFS48C的Datasheet PDF文件第6页浏览型号XCF16PFS48C的Datasheet PDF文件第7页 
<BL Blue>  
Platform Flash In-System  
Programmable Configuration  
PROMS  
R
0
DS123 (v2.9) May 09, 2006  
Product Specification  
Features  
In-System Programmable PROMs for Configuration of  
Xilinx FPGAs  
XCF01S/XCF02S/XCF04S  
3.3V supply voltage  
Low-Power Advanced CMOS NOR FLASH Process  
Endurance of 20,000 Program/Erase Cycles  
Serial FPGA configuration interface (up to 33 MHz)  
Available in small-footprint VO20 and VOG20  
packages.  
Operation over Full Industrial Temperature Range  
(–40°C to +85°C)  
XCF08P/XCF16P/XCF32P  
IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)  
Support for Programming, Prototyping, and Testing  
1.8V supply voltage  
Serial or parallel FPGA configuration interface  
(up to 33 MHz)  
JTAG Command Initiation of Standard FPGA  
Configuration  
Available in small-footprint VO48, VOG48, FS48,  
and FSG48 packages  
Cascadable for Storing Longer or Multiple Bitstreams  
Dedicated Boundary-Scan (JTAG) I/O Power Supply  
Design revision technology enables storing and  
accessing multiple design revisions for  
configuration  
(V  
)
CCJ  
I/O Pins Compatible with Voltage Levels Ranging From  
1.5V to 3.3V  
Built-in data decompressor compatible with Xilinx  
advanced compression technology  
Design Support Using the Xilinx Alliance ISE and  
Foundation ISE Series Software Packages  
Table 1: Platform Flash PROM Features  
Program  
In-system  
via JTAG  
Serial  
Parallel  
Design  
Density  
VCCINT VCCO Range VCCJ Range  
Packages  
Compression  
Device  
Config. Config. Revisioning  
XCF01S  
XCF02S  
XCF04S  
1 Mbit  
2 Mbit  
4 Mbit  
3.3V 1.8V – 3.3V 2.5V – 3.3V VO20/VOG20  
3.3V 1.8V – 3.3V 2.5V – 3.3V VO20/VOG20  
3.3V 1.8V – 3.3V 2.5V – 3.3V VO20/VOG20  
VO48/VOG48  
1.8V 1.5V – 3.3V 2.5V – 3.3V  
FS48/FSG48  
XCF08P  
8 Mbit  
VO48/VOG48  
1.8V 1.5V – 3.3V 2.5V – 3.3V  
FS48/FSG48  
XCF16P 16 Mbit  
XCF32P 32 Mbit  
VO48/VOG48  
1.8V 1.5V – 3.3V 2.5V – 3.3V  
FS48/FSG48  
Description  
Xilinx introduces the Platform Flash series of in-system  
programmable configuration PROMs. Available in 1 to 32  
Megabit (Mbit) densities, these PROMs provide an  
easy-to-use, cost-effective, and reprogrammable method  
for storing large Xilinx FPGA configuration bitstreams. The  
Platform Flash PROM series includes both the 3.3V  
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS  
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that  
support Master Serial and Slave Serial FPGA configuration  
modes (Figure 1, page 2). The XCFxxP version includes  
32-Mbit, 16-Mbit, and 8-Mbit PROMs that support Master  
Serial, Slave Serial, Master SelectMAP, and Slave  
SelectMAP FPGA configuration modes (Figure 2, page 2).  
A summary of the Platform Flash PROM family members  
and supported features is shown in Table 1.  
© 2003-2006 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
PowerPC is a trademark of IBM, Inc. All other trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS123 (v2.9) May 09, 2006  
www.xilinx.com  
1

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